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Understanding the impact of split-gate LDMOS transistors: Analysis of performance and hot-carrier-induced degradation
Solid-State Electronics ( IF 1.4 ) Pub Date : 2021-05-28 , DOI: 10.1016/j.sse.2021.108068
P. Magnone , A.N. Tallarico , S. Pistollato , R. Depetro , G. Croce

In this paper a split-gate LDMOS transistor is investigated. A dedicated terminal, namely split-gate, is introduced in order to control the field plate region separately with respect to the channel region. The performances of the device, in terms of on-resistance, breakdown voltage and capacitances, are compared with those of a conventional device. The hot-carrier-induced degradation of the device is also investigated, highlighting the influence of the split-gate voltage. This work allows identifying a tradeoff between the performance and reliability of the component, which is controlled by the voltage applied to the split-gate terminal.



中文翻译:

了解分裂栅 LDMOS 晶体管的影响:性能和热载流子引起的退化分析

在本文中,研究了一种分裂栅 LDMOS 晶体管。引入了专用端子,即分裂栅,以便相对于沟道区分别控制场板区。该器件在导通电阻、击穿电压和电容方面的性能与传统器件进行了比较。还研究了热载流子引起的器件退化,突出了分裂栅电压的影响。这项工作允许确定组件的性能和可靠性之间的权衡,这是由施加到分栅端子的电压控制的。

更新日期:2021-06-05
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