Achieving a reliable multilevel programming operation in resistive random access memory (RRAM) arrays is still a challenging task. In this work, we assessed the impact of the voltage step value used by the programming algorithm on the device-to-device (DTD) variability of the current distributions of four conductive levels and on the energy consumption featured by programming 4-kbit HfO 2 -based RRAM arrays. Two different write-verify algorithms were considered and compared, namely, the incremental gate voltage with verify algorithm (IGVVA) and the incremental step pulse with verify algorithm (ISPVA). By using the IGVVA, a main tradeoff has to be considered since reducing the voltage step leads to a smaller DTD variability at the cost of a strong increase in energy consumption. Although the ISPVA cannot reduce the DTD variability as much as the IGVVA, its voltage step can be decreased in order to reduce the energy consumption with almost no impact on the DTD variability. Therefore, the final decision on which algorithm to employ should be based on the specific application targeted for the RRAM array.

中文翻译：

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RRAM 阵列多级编程中的可变性和能耗权衡


在电阻式随机存取存储器（RRAM）阵列中实现可靠的多级编程操作仍然是一项具有挑战性的任务。在这项工作中，我们评估了编程算法使用的电压阶跃值对四个导电层电流分布的器件间 (DTD) 变异性以及对 4 kbit HfO 2 编程的能耗的影响。基于 RRAM 阵列。考虑并比较了两种不同的写入验证算法，即增量栅极电压验证算法（IGVVA）和增量步进脉冲验证算法（ISPVA）。通过使用 IGVVA，必须考虑一个主要的权衡，因为减少电压阶跃会导致更小的 DTD 变化，但代价是能耗大幅增加。虽然ISPVA不能像IGVVA那样降低DTD变异性，但可以降低其电压阶跃以降低能耗，而对DTD变异性几乎没有影响。因此，最终决定采用哪种算法应基于 RRAM 阵列的具体应用。