Gate-all-around (GAA) silicon nanowire (NW) CMOS transistors demonstrate outstanding total-ionizing-dose (TID) tolerance due to the ultrascaled gate dielectric thickness, enhanced electrostatic gate control, and suppression of parasitic leakage current paths. nFETs and pFETs show similar TID responses, making the GAA NW technology an excellent candidate for CMOS IC applications in high-radiation environments. The slight degradation of the threshold voltage suggests limited charge buildup in the gate dielectrics. However, low-frequency noise and random telegraph noise measurements show the importance of change in trap configurations in both the near-interfacial SiO ₂ and HfO ₂ dielectric layers to the radiation response and reliability of GAA NW devices. These traps are most likely due to oxygen vacancies and/or hydrogen complexes.

中文翻译：

---

大规模全栅硅纳米线CMOS晶体管的总电离剂量响应

全方位栅（GAA）硅纳米线（NW）CMOS晶体管由于超尺度栅介电层厚度，增强的静电栅控制和抑制寄生漏电流路径而表现出出色的总电离剂量（TID）容限。nFET和pFET表现出相似的TID响应，使GAA NW技术成为高辐射环境中CMOS IC应用的极佳候选者。阈值电压的轻微降低表明栅极电介质中的电荷积累有限。然而，低频噪声和随机电报噪声测量结果表明，在近界面SiO ₂和HfO _2中，陷阱结构变化的重要性 介电层对GAA NW器件的辐射响应和可靠性的影响。这些陷阱最有可能是由于氧空位和/或氢络合物。