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Understanding the Insecurity of Processor Caches Due to Cache Timing-Based Vulnerabilities
IEEE Security & Privacy ( IF 2.9 ) Pub Date : 2021-02-24 , DOI: 10.1109/msec.2021.3055799
Shuwen Deng 1 , Wenjie Xiong 2 , Jakub Szefer 2
Affiliation  

This article discusses a recently developed test suite for checking timingbased vulnerabilities in processor caches, which has revealed the insecurity of today's processor caches. The susceptibility of caches to these vulnerabilities calls for more research on secure processor caches.

中文翻译:


了解基于缓存时序的漏洞导致的处理器缓存的不安全性



本文讨论了最近开发的测试套件,用于检查处理器缓存中基于时序的漏洞,该套件揭示了当今处理器缓存的不安全性。缓存对这些漏洞的敏感性要求对安全处理器缓存进行更多研究。
更新日期:2021-02-24
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