In traditional von Neumann computing architectures, the essential transfer of data between the processor and memory hierarchies limits the computational efficiency of next-generation system-on-a-chip. The emerging in-memory computing (IMC) approach addresses this issue and facilitates the movement of significant data and rapid computations. Among the different memory types, intrinsic energy efficiency is demonstrated by in-magnetic random access memory (MRAM) computing with a low-power spintronic magnetic tunnel junction device and hybrid integration at an advanced complementary metal-oxide semiconductor node. This study reviews state-of-the-art techniques for managing IMC with an emphasis on spin-transfer torque-MRAM computing via design schemes at the bit-cell, circuit, and system levels. In addition, this study presents effective design techniques and potential challenges and demonstrates the existing limitations of in-MRAM computing and potential methods for overcoming these issues. This study also considers the design technology co-optimization from the IMC perspective.

在传统的冯·诺依曼计算体系结构中，处理器和内存层次结构之间必不可少的数据传输限制了下一代片上系统的计算效率。新兴的内存计算（IMC）方法解决了此问题，并促进了重要数据的移动和快速计算。在不同的存储器类型中，固有能量效率通过具有低功率自旋电子磁性隧道结器件的电磁随机存取存储器（MRAM）计算以及在先进的互补金属氧化物半导体节点处的混合集成来证明。这项研究回顾了管理IMC的最新技术，重点是通过在位单元，电路和系统级的设计方案进行自旋转移矩MRAM计算。此外，这项研究提出了有效的设计技术和潜在的挑战，并展示了MRAM内计算的现有局限性以及解决这些问题的潜在方法。这项研究还从IMC的角度考虑了设计技术的共同优化。