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Flexible 5G New Radio LDPC Encoder Optimized for High Hardware Usage Efficiency
Electronics ( IF 2.6 ) Pub Date : 2021-05-08 , DOI: 10.3390/electronics10091106
Vladimir L. Petrović , Dragomir M. El El Mezeni , Andreja Radošević

Quasi-cyclic low-density parity-check (QC–LDPC) codes are introduced as a physical channel coding solution for data channels in 5G new radio (5G NR). Depending on the use case scenario, this standard proposes the usage of a wide variety of codes, which imposes the need for high encoder flexibility. LDPC codes from 5G NR have a convenient structure and can be efficiently encoded using forward substitution and without computationally intensive multiplications with dense matrices. However, the state-of-the-art solutions for encoder hardware implementation can be inefficient since many hardware processing units stay idle during the encoding process. This paper proposes a novel partially parallel architecture that can provide high hardware usage efficiency (HUE) while achieving encoder flexibility and support for all 5G NR codes. The proposed architecture includes a flexible circular shifting network, which is capable of shifting a single large bit vector or multiple smaller bit vectors depending on the code. The encoder architecture was built around the shifter in a way that multiple parity check matrix elements can be processed in parallel for short codes, thus providing almost the same level of parallelism as for long codes. The processing schedule was optimized for minimal encoding time using the genetic algorithm. The optimized encoder provided high throughputs, low latency, and up-to-date the best HUE.

中文翻译:

优化的灵活5G新型无线LDPC编码器,可提高硬件使用效率

引入了准循环低密度奇偶校验(QC–LDPC)码作为5G新无线电(5G NR)中数据信道的物理信道编码解决方案。根据使用情况,该标准建议使用多种代码,这要求具有较高的编码器灵活性。来自5G NR的LDPC码具有方便的结构,可以使用前向替换有效地进行编码,而无需使用密集矩阵进行计算密集型乘法。然而,由于许多硬件处理单元在编码过程中保持空闲,因此用于编码器硬件实施的最新解决方案可能效率不高。本文提出了一种新颖的部分并行架构,该架构可提供高硬件使用效率(HUE),同时实现编码器灵活性并支持所有5G NR码。所提出的体系结构包括灵活的循环移位网络,该网络能够根据代码移位单个较大的位向量或多个较小的位向量。编码器体系结构围绕移位器构建,其方式是可以针对短代码并行处理多个奇偶校验矩阵元素,从而提供与长代码几乎相同的并行度。使用遗传算法对处理计划进行了优化,以缩短编码时间。经过优化的编码器可提供高吞吐量,低延迟和最新的最佳HUE。编码器体系结构围绕移位器构建,其方式是可以针对短代码并行处理多个奇偶校验矩阵元素,从而提供与长代码几乎相同的并行度。使用遗传算法对处理计划进行了优化,以缩短编码时间。经过优化的编码器可提供高吞吐量,低延迟和最新的最佳HUE。编码器体系结构围绕移位器构建,其方式是可以针对短代码并行处理多个奇偶校验矩阵元素,从而提供与长代码几乎相同的并行度。使用遗传算法对处理计划进行了优化,以缩短编码时间。经过优化的编码器可提供高吞吐量,低延迟和最新的最佳HUE。
更新日期:2021-05-08
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