Implantable brain machine interfaces for treatment of neurological disorders require on-chip, real-time signal processing of action potentials (spikes). In this work, we present the first spike sorting SoC with integrated neural recording front-end and analog unsupervised classifier. The event-driven, low power spike sorter features a novel hardware-optimized, K-means based algorithm that effectively eliminates duplicate clusters and is implemented using a novel clockless and ADC-less analog architecture. The $1.4\ {\boldsymbol{m}}{{\boldsymbol{m}}^2}$ chip is fabricated in a 180-nm CMOS SOI process. The analog front-end achieves a 3.3 ${\boldsymbol{\mu }}{{{\bf V}}_{{{\bf rms}}}}$ noise floor over the spike bandwidth (400 – 5000 Hz) and consumes 6.42 ${\boldsymbol{\mu }}$ W from a 1.5 V supply. The analog spike sorter consumes 4.35 ${\boldsymbol{\mu }}$ W and achieves 93.2% classification accuracy on a widely used synthetic test dataset. In addition, higher than 93% agreement between the chip classification result and that of a standard spike sorting software is observed using pre-recorded real neural signals. Simulations of the implemented spike sorter show robust performance under process-voltage-temperature variations.

中文翻译：

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具有用于尖峰排序的无监督模拟分类器的 10.8 µW 神经信号记录器和处理器

用于治疗神经系统疾病的植入式脑机接口需要对动作电位（尖峰）进行片上实时信号处理。在这项工作中，我们展示了第一个具有集成神经记录前端和模拟无监督分类器的尖峰排序 SoC。事件驱动的低功耗尖峰分类器采用新颖的硬件优化、基于 K 均值的算法，可有效消除重复簇，并使用新颖的无时钟和无 ADC 模拟架构实现。这$1.4\ {\boldsymbol{m}}{{\boldsymbol{m}}^2}$芯片采用 180 纳米 CMOS SOI 工艺制造。模拟前端达到 3.3${\boldsymbol{\mu }}{{{\bf V}}_{{{\bf rms}}}}$ 尖峰带宽 (400 – 5000 Hz) 上的本底噪声并消耗 6.42 ${\boldsymbol{\mu }}$ W 来自 1.5 V 电源。模拟穗分拣机消耗 4.35${\boldsymbol{\mu }}$ W 并在广泛使用的合成测试数据集上实现了 93.2% 的分类准确率。此外，使用预先记录的真实神经信号观察到芯片分类结果与标准尖峰排序软件的结果之间的一致性超过 93%。实施的尖峰分选器的模拟显示了在过程电压温度变化下的稳健性能。