In this work, ISFET frontends utilising the direct tunneling current to eliminate trapped charge are proposed. The principle has been investigated and verified via silicon-imitated ISFET first, where silicon capacitors are used to imitate the passivation ones. Because the dominant tunneling components depend on the potential difference between Gate and Drain terminals, a source-follower structure could itself perform a highpass filter with time constant at 10–100 seconds level. Additionally, a time-constant regulation mechanism is presented by feeding the output signal back to the drain terminal of ISFETs, achieving a regulation factor over 50, namely from 4.7 seconds to 243.4 seconds in our implementation. Afterwards in chemical test, proposed ISFETs have been verified in terms of unit passivation capacitance, linearity, noise and sensitivity for ISFETs with 3 different top metal areas. It is found that approximately 30.12 mV/pH sensitivity can be achieved, and for the first time we managed to derive the relation between chemical flicker noise and sensing metal area.

中文翻译：

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通过直接隧道原理设计用于 CMOS ISFET 的极低截止频率高通前端

在这项工作中，提出了利用直接隧道电流来消除俘获电荷的 ISFET 前端。该原理首先通过硅仿ISFET进行了研究和验证，其中硅电容器用于模仿钝化电容器。由于主要的隧道元件取决于栅极和漏极端子之间的电位差，源极跟随器结构本身可以执行时间常数为 10-100 秒级别的高通滤波器。此外，通过将输出信号反馈回 ISFET 的漏极端子，提出了一种时间常数调节机制，实现了超过 50 的调节因子，即在我们的实现中从 4.7 秒到 243.4 秒。随后在化学测试中，提出的 ISFET 在单位钝化电容、线性度、具有 3 个不同顶部金属区域的 ISFET 的噪声和灵敏度。发现可以达到大约 30.12 mV/pH 的灵敏度，这是我们第一次设法推导出化学闪烁噪声与感应金属面积之间的关系。