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Scaling of atomic layer etching of SiO2in fluorocarbon plasmas: Transient etching and surface roughness
Journal of Vacuum Science & Technology A ( IF 2.4 ) Pub Date : 2021-03-16 , DOI: 10.1116/6.0000941
Xifeng Wang 1 , Mingmei Wang 2 , Peter Biolsi 2 , Mark J. Kushner 1
Affiliation  

Fabricating sub-10 nm microelectronics places plasma processing precision at atomic dimensions. Atomic layer etching (ALE) is a cyclic plasma process used in semiconductor fabrication that has the potential to remove a single layer of atoms during each cycle. In self-limiting ideal ALE, a single monolayer of a material is consistently removed in each cycle, typically expressed as EPC (etch per cycle). In plasma ALE of dielectrics, such as SiO2 and Si3N4, using fluorocarbon gas mixtures, etching proceeds through deposition of a thin polymer layer and the process is not strictly self-terminating. As a result, EPC is highly process dependent and particularly sensitive to the thickness of the polymer layer. In this paper, results are discussed from a computational investigation of the ALE of SiO2 on flat surfaces and in short trenches using capacitively coupled plasmas consisting of a deposition step (fluorocarbon plasma) and an etch step (argon plasma). We found that ALE performance is a delicate balance between deposition of polymer during the first half cycle and etching (with polymer removal) during the second half cycle. In the absence of complete removal of the overlying polymer in each cycle, ALE may be transient as the polymer thickness grows with each cycle with a reduction in EPC until the thickness is too large to enable further etching. Small and statistical amounts of polymer left from a previous cycle can produce statistical variation in polymer thickness on the next cycle, which in turn can lead to a spatially dependent EPC and ALE roughness. Based on synergy between Ti (sputtering time) and Tp (passivation time), dielectric ALE can be described as having three modes: deposition, roughening surface (transitioning to etch-stop), and smooth surface with steady-state EPC.

中文翻译:

碳氟化合物等离子体中SiO2原子层蚀刻的缩放比例:瞬态蚀刻和表面粗糙度

制造亚10纳米以下的微电子器件可将等离子体处理精度提高到原子尺寸。原子层蚀刻(ALE)是半导体制造中使用的循环等离子体工艺,具有在每个循环中去除单个原子层的潜力。在自我限制的理想ALE中,通常在每个周期中始终将材料的单个单层去除,通常表示为EPC(每个周期的蚀刻)。在电介质(例如SiO 2和Si 3 N 4)的等离子ALE中使用碳氟化合物气体混合物,蚀刻会通过沉积薄的聚合物层进行,并且该过程并非严格地自终止。结果,EPC高度依赖于工艺并且对聚合物层的厚度特别敏感。本文讨论了SiO 2 ALE的计算研究结果。在平坦表面和短沟槽中使用电容耦合等离子体,该等离子体由沉积步骤(碳氟化合物等离子体)和蚀刻步骤(氩气等离子体)组成。我们发现,ALE性能是前半个周期内聚合物沉积与后半个周期内蚀刻(除去聚合物)之间的微妙平衡。在每个循环中都没有完全去除上面的聚合物的情况下,ALE可能会短暂,因为每个循环中聚合物的厚度会随着EPC的减少而增加,直到厚度过大而无法进一步蚀刻为止。前一个循环中残留的少量统计量聚合物会在下一个循环中产生聚合物厚度的统计变化,进而会导致空间依赖性EPC和ALE粗糙度。基于T i之间的协同作用(溅射时间)和T p(钝化时间),介电ALE可以描述为具有三种模式:沉积,粗糙化表面(过渡到蚀刻停止)和具有稳态EPC的光滑表面。
更新日期:2021-05-07
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