This work presents possible variations in TRL calibrated on-wafer S-parameters measurements with change in the on-wafer reflect design (pad open to pad short or vice-versa) in the TRL calibration method. The variations in each error-term values due to the change in the on-wafer reflect in the TRL calibration are examined which shows the source match and reflect tracking as possible error-terms bringing the observed variations in the on-wafer TRL calibrated S-parameter. In order to identify sources introducing these variations in the error-terms values and the S-parameters, TRL calibrated on-wafer S-parameters (S11 and S22) of symmetric structures (both reflects, i.e., pad open and pad short) are compared. Further, to develop a deep understanding about variations in error-terms values and in the S-parameters, a comprehensive 3D electromagnetic (EM) simulation study is performed. First, EM simulation analyses considering only one structure in simulation setup are performed to examine role of probe-to-probe and probe-to-substrate couplings. Later, EM simulation study is carried out to analyze the impact of the on-wafer neighbors, and the spatial position of the on-wafer neighbors. The EM simulation study shows a strong impact of the coupling of the DUT with the on-wafer neighbors, the spatial placement of the on-wafer neighbors, and the design of the reflect whereby the influence of the probe-to-probe coupling is partially masked by the aforementioned effects.

中文翻译：

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太赫兹以下硅上晶圆 TRL 校准变化的研究


这项工作提出了 TRL 校准晶圆上 S 参数测量可能随 TRL 校准方法中晶圆上反射设计（焊盘开路到焊盘短路或反之亦然）的变化而变化。检查由于 TRL 校准中晶圆上反射的变化而导致的每个误差项值的变化，这显示了源匹配和反射跟踪作为可能的误差项，带来了晶圆上 TRL 校准 S 中观察到的变化范围。为了确定误差项值和 S 参数中引入这些变化的来源，对对称结构（均反映焊盘开路和焊盘短路）的 TRL 校准晶圆上 S 参数（S11 和 S22）进行了比较。此外，为了深入了解误差项值和 S 参数的变化，进行了全面的 3D 电磁 (EM) 仿真研究。首先，执行仅考虑仿真设置中的一种结构的电磁仿真分析，以检查探针与探针以及探针与基底耦合的作用。随后，进行电磁仿真研究来分析晶圆上邻居的影响以及晶圆上邻居的空间位置。 EM 仿真研究表明，DUT 与晶圆上相邻器件的耦合、晶圆上相邻器件的空间布局以及反射设计产生了强烈影响，其中探针间耦合的影响部分受到影响。被上述影响所掩盖。