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Lookup table‐based negative‐bias temperature instability effect and leakage power co‐optimization using genetic algorithm approach
International Journal of Circuit Theory and Applications ( IF 1.581 ) Pub Date : 2021-05-03 , DOI: 10.1002/cta.3038
Abhishek Bhattacharjee, Dheeraj Kumar Sahu, Sambhu Nath Pradhan

As a result of continuous scaling of transistors, negative bias temperature instability (NBTI) has become a serious reliability concern which causes the device to degrade over its lifetime. Similarly, leakage power also remains a key issue in deep submicron technologies. Both NBTI‐related delay degradation and standby time leakage power depend strongly on the circuit's input patterns. The input vector control (IVC) technique can be used for mitigating both NBTI‐related delay degradation and leakage power. However, the input vectors with the least NBTI‐induced degradation may not be the same ones with the least leakage power in any circuit; therefore, co‐optimization is needed to minimize leakage and NBTI‐induced degradation. In this paper, a genetic algorithm (GA)‐based approach is presented to co‐optimize both NBTI‐related performance degradation and also leakage power. We are also presenting a trade‐off analysis by giving different weightage to the NBTI effect and leakage power. Simulation results applied on ISCAS'85 benchmark circuits illustrate that on average our proposed technique saves up to 21.85% and 17.68% circuit performance degradation and the leakage power, respectively.

中文翻译:

使用遗传算法的基于查找表的负偏温度不稳定性影响和漏电功率共同优化

由于晶体管的连续缩放,负偏置温度不稳定性(NBTI)已成为严重的可靠性问题,导致器件在其整个生命周期内性能下降。同样,泄漏功率仍然是深亚微米技术中的关键问题。与NBTI相关的延迟衰减和待机时间泄漏功率都很大程度上取决于电路的输入模式。输入矢量控制(IVC)技术可用于缓解NBTI相关的延迟降低和泄漏功率。但是,在任何电路中,NBTI引起的降级最小的输入矢量可能与漏功率最小的不同。因此,需要进行协同优化以最大程度地减少泄漏和NBTI引起的降解。在本文中,提出了一种基于遗传算法(GA)的方法,以共同优化与NBTI相关的性能下降以及泄漏功率。我们还将通过对NBTI效应和泄漏功率赋予不同的权重来进行权衡分析。在ISCAS'85基准电路上进行的仿真结果表明,平均而言,我们提出的技术可分别节省21.85%和17.68%的电路性能,并节省泄漏功率。
更新日期:2021-05-04
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