In this paper, a lightweight 8-bit S-box and combined S-box/S-box⁻¹ with a security level equal to the AES S-box is presented. From the viewpoint of hardware implementation, the S-box has better hardware and timing complexities. The structure is based on an efficient field inversion and a low-cost affine transformation. The field multiplications over in the inversion circuit are implemented by resource sharing to reduces logic gates. The original equations of the inversion over are optimally rewritten. In addition, a part of the S-box called Part1 is optimized for reducing area and delay. This part consists of two addition operations, one multiplication, field squaring, and multiplication by constant λ, which all operations are over . The subblocks of Part1 are combined to generate a unified structure. Security analysis of the proposed S-box showed that the structure has a security level equal to the Advanced Encryption Standard (AES) S-box. The implementation results in 180- and 65-nm Complementary metal oxide semiconductor (CMOS) technologies show the proposed S-box and combined S-box/S-box⁻¹ are comparable in terms of area, delay, and area × delay than most of the famous S-boxes. The proposed S-box is a high-secure and area-efficient S-box as a good candidate for block ciphers.

中文翻译：

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用于加密应用的轻量级 8 位 S-box 和组合 S-box/S-box-1

在本文中，提出了一种轻量级的 8 位 S-box 和组合 S-box/S-box ^-1，其安全级别等于 AES S-box。从硬件实现的角度来看，S-box 具有更好的硬件和时序复杂度。该结构基于高效的场反演和低成本的仿射变换。反相电路中的域乘法是通过资源共享实现的，以减少逻辑门。反演的原始方程被最佳地重写。此外，S-box 中称为 Part1 的部分进行了优化，以减少面积和延迟。这部分由两个加法运算组成，一个是乘法，一个是域平方，一个是乘以常数λ，所有的运算都结束了. Part1 的子块组合在一起，生成一个统一的结构。对所提出的 S-box 的安全分析表明，该结构具有与高级加密标准 (AES) S-box 相同的安全级别。180 纳米和 65 纳米互补金属氧化物半导体 (CMOS) 技术的实施结果表明，所提出的 S-box 和组合 S-box/S-box ^-1在面积、延迟和面积 × 延迟方面比大多数技术具有可比性著名的 S 盒。所提出的 S-box 是一种高安全性和区域效率的 S-box，是分组密码的良好候选者。