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A new hardware architecture of the adaptive vector median filter and validation in a hardware/software environment
International Journal of Circuit Theory and Applications ( IF 1.581 ) Pub Date : 2021-05-02 , DOI: 10.1002/cta.3000
Ahmed Ben Atitallah, Imen Abid, Anis Boudabous, Hassen Loukil

Presented in this paper is a new hardware architecture of the adaptive vector median filter (AVMF). The suggested structure yielded important values in impulsive noise removal from color images while preserving their fine details. The software (SW) study of this filter demonstrated that its implementation is too complex. To overcome this limitation, some approximations using a ROM memory were proposed to perform the square root for a hardware (HW) implementation. Comparative results between the ideal and approximated SWs of the AVMF showed a relative error equal to 0.01%. Then, sequential and parallel HW architectures were developed for this filter based on the approximated method. Finally, the validation of these architectures was conducted using an field‐programmable gate array (FPGA) platform on an HW/SW environment. The validation results demonstrated that the proposed HW/SW implementation of the AVMF can speed up the execution time 180 times in the worst case at 140 MHz compared to the SW solution as well as preserving a high data quality (same image quality).

中文翻译:

硬件/软件环境中自适应矢量中值滤波器的新硬件架构和验证

本文介绍的是自适应矢量中值滤波器(AVMF)的新硬件架构。所建议的结构在从彩色图像中去除脉冲噪声时产生了重要的价值,同时保留了它们的精细细节。该过滤器的软件(SW)研究表明,其实现过于复杂。为了克服此限制,提出了一些使用ROM存储器的近似方法来执行硬件(HW)实现的平方根。AVMF的理想软件和近似软件之间的比较结果显示相对误差等于0.01 。然后,基于近似方法为该滤波器开发了顺序和并行硬件架构。最后,在硬件/软件环境中使用现场可编程门阵列(FPGA)平台对这些体系结构进行了验证。验证结果表明,与SW解决方案相比,AVMF的HW / SW实施方案在最坏的情况下,与SW解决方案相比,可以将执行时间加快180倍,并且可以保持较高的数据质量(相同的图像质量)。
更新日期:2021-05-04
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