The focus of existing designs on approximate radix-8 Booth multipliers has been on ASIC-based platforms. These multipliers are based on an approximation as defined for ASIC-based systems, so they cannot achieve comparable performance gains when used for FPGA-based hardware accelerators. This is due to the inherited architectural differences between FPGAs and ASICs. This brief bridges this gap by proposing high-performance approximate radix-8 Booth multipliers whose designs target FPGA-based systems. Hence, two approximate radix-8 Booth multipliers (referred to as AxBM1 and AxBM2) are proposed. Approximation is implemented such that the 6-input lookup table (LUT) and the associated carry chains of the FPGAs are fully utilized. AxBM2 exhibits 49% improvement in delay compared to the previous best FPGA-targeted design (Booth-Approx). AxBM2 has the advantage of complementing errors; this feature has been combined with truncation to achieve up to 60% in energy savings. Moreover, the resolution of the previous state-of-the-art error-energy Pareto front is improved, such that better energy gains can be achieved for a given error constraint. As a case study, the proposed multipliers are applied to the application of Sobel edge detection, AxBM2 detected 98.45% edges with energy savings of 26.41%.

中文翻译：

---

AxBM：用于高性能基于FPGA的加速器的近似Radix-8展台乘法器

现有设计对基数为8的近似Booth乘法器的关注点一直在基于ASIC的平台上。这些乘法器基于为基于ASIC的系统定义的近似值，因此当用于基于FPGA的硬件加速器时，它们无法实现可比的性能提升。这是由于FPGA和ASIC之间继承的体系结构差异。通过提供高性能的基数为8的Booth乘法器，本文简要介绍了这种差距，该乘法器的设计针对基于FPGA的系统。因此，提出了两个近似的基数为8的Booth乘数（称为AxBM1和AxBM2）。实现逼近，以便充分利用6输入查找表（LUT）和FPGA的相关进位链。与以前的最佳FPGA定位设计（Booth-Approx）相比，AxBM2的延迟提高了49％。AxBM2具有弥补错误的优势；此功能与截断功能相结合，可节省多达60％的能源。此外，改进了先前的最新的误差能量帕累托前沿的分辨率，从而对于给定的误差约束可以实现更好的能量增益。作为案例研究，所提出的乘法器被应用于Sobel边缘检测的应用中，AxBM2检测到98.45％的边缘，节能26.41％。