Convolutional neural networks (CNNs) have been evolving with tremendous success in visual recognition, obtaining human-level accuracy. The conventional hardware architecture, however, is facing difficulty in realizing real-time and energy-efficient operations on CNN. To efficiently operate CNN algorithms on the hardware, researchers are actively studying processing-in-memory (PIM) with resistive random-access memory (ReRAM). Digital PIM is particularly attractive because analog designs struggle with undesirable device properties and require additional circuits like analog-to-digital converter and digital-to-analog converter. However, the massive area originated from digital PIM is a hindrance to its applications. In this work, we present a three-dimensional (3D) ReRAM convolution logic processor design to tackle the limitation of digital PIM. At the hardware level, we leverage 3D ReRAM to take advantage of its area efficiency. The design simplicity without accuracy loss is accomplished by exploiting binarized weight networks (BWNs) at the algorithm level. Specifically, our 3D ReRAM processor computes the convolution of BWN based on a presumed full adder and a split-half addition scheme, which are proposed in this brief to maximize resource consumption efficiency. As a result, the proposed design achieves $3.7\times $ to $5.7\times $ and $5\times $ to $42.5\times $ area- and time-saving according to the bit precision in comparison to the original digital PIM.

中文翻译：

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用于二值化加权网络的高效3D ReRAM卷积处理器设计

卷积神经网络（CNN）在视觉识别方面取得了巨大的成功，并取得了人类水平的准确性。但是，常规的硬件体系结构在实现CNN上的实时和节能操作方面面临着困难。为了在硬件上有效地操作CNN算法，研究人员正在积极研究内存中处理 （PIM）与 电阻式随机存取存储器（ReRAM）。数字PIM尤其具有吸引力，因为模拟设计面临着不良的器件性能，并且需要诸如模数转换器和数模转换器之类的附加电路。但是，源自数字PIM的巨大面积阻碍了其应用。在这项工作中，我们提出了一个三维（3D）ReRAM卷积逻辑处理器设计可解决数字PIM的局限性。在硬件级别，我们利用3D ReRAM来利用其面积效率。通过利用以下优势实现了设计的简单性而又没有精度的损失二值化权重网络（BWN）在算法级别。具体来说，我们的3D ReRAM处理器基于假定的全加法器和分半加法，计算BWN的卷积，在本摘要中提出这些方法以最大化资源消耗效率。结果，提出的设计实现了 $ 3.7 \次$ 至 $ 5.7 \次$ 和 $ 5 \次$ 至 $ 42.5 \次$ 与原始数字PIM相比，根据位精度节省了面积和时间。