True Random Number Generators (TRNGs) create a hardware-based, non-deterministic noise that is used for generating keys, initialization vectors, and nonces in a variety of applications requiring cryptographic protection. A compromised TRNG may lead to a system-wide loss of security. In this brief, we show that an attack combining power analysis with bitstream modification is capable of classifying the output bits of a TRNG implemented in FPGAs from a single power measurement. We demonstrate the attack on the example of an open source AIS-20/31 compliant ring oscillator-based TRNG implemented in Xilinx Artix-7 28nm FPGAs. The combined attack opens a new attack vector which makes possible what is not achievable with pure bitstream modification or side-channel analysis.

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深度学习能否打破真正的随机数生成器？

真随机数发生器（TRNG）会创建基于硬件的不确定性噪声，该噪声用于在需要密码保护的各种应用中生成密钥，初始化向量和随机数。受损的TRNG可能导致系统范围的安全性损失。在本文中，我们展示了结合功率分析和比特流修改的攻击能够通过一次功率测量对在FPGA中实现的TRNG的输出位进行分类。我们以Xilinx Artix-7 28nm FPGA中实现的基于开放源AIS-20 / 31的，基于环形振荡器的TRNG为例演示攻击。组合攻击打开了一个新的攻击媒介，这使纯比特流修改或边信道分析无法实现的攻击成为可能。