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High-Performance Spintronic Nonvolatile Ternary Flip-Flop and Universal Shift Register
IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( IF 2.8 ) Pub Date : 2021-02-12 , DOI: 10.1109/tvlsi.2021.3055983
Abdolah Amirany , Kian Jafari , Mohammad Hossein Moaiyeri

Multiple-valued logic (MVL) shows considerable advantages over binary logic in certain applications because of the increased informational content of its signals, and hence reduction in interconnects. Flip-flops (FFs) are the basic elements of many systems and are widely used in microprocessors due to their high performance. This article presents two spintronic ternary retention FFs, and a nonvolatile universal ternary shift register (NUTSR) based on gate-all-around carbon nanotube field-effect transistors (GAA-CNTFETs) and nonvolatile magnetic tunnel junction (MTJ). In the proposed input-aware ternary retention FF circuit, power consumption is significantly reduced by adding a magnitude comparator (MC) circuit and preventing duplicate data transfer to MTJs. Simulation results indicate that our design offers at least 22%, 40%, and 15% reductions in power consumption, backup time, and restore energy, respectively. Moreover, it eliminates the risk of data loss in the event of a sudden power outage.

中文翻译:

高性能自旋电子非易失性三态触发器和通用移位寄存器

在某些应用中,多值逻辑(MVL)与二进制逻辑相比具有明显的优势,这是因为其信号的信息内容增加,从而减少了互连。触发器(FF)是许多系统的基本元素,由于其高性能而被广泛用于微处理器中。本文介绍了两个自旋电子三元保持FF,以及一个基于全栅碳纳米管场效应晶体管(GAA-CNTFET)和非易失性磁性隧道结(MTJ)的非易失性通用三元移位寄存器(NUTSR)。在提出的输入感知三元保持FF电路中,通过添加幅度比较器(MC)电路并防止重复数据传输到MTJ,可以显着降低功耗。仿真结果表明,我们的设计至少提供22%,40%,和分别减少15%的功耗,备用时间和恢复能源。而且,它消除了在突然断电的情况下数据丢失的风险。
更新日期:2021-02-12
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