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CRC-Based Error Detection Constructions for FLT and ITA Finite Field Inversions Over GF(2m)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( IF 2.8 ) Pub Date : 2021-03-10 , DOI: 10.1109/tvlsi.2021.3061987
Alvaro Cintas Canto , Mehran Mozaffari Kermani , Reza Azarderakhsh

Binary extension finite fields ${\mathrm{ GF}}(2^{m})$ have received prominent attention in the literature due to their application in many modern public-key cryptosystems and error-correcting codes. In particular, the inversion over ${\mathrm{ GF}}(2^{m})$ is crucial for current and postquantum cryptographic applications. Schemes such as Fermat’s little theorem (FLT) and the Itoh–Tsujii algorithm (ITA) have been studied to achieve better performance; however, this arithmetic operation is a complex, expensive, and time-consuming task that may require thousands of gates, increasing its vulnerability chance to natural defects. In this work, we propose efficient hardware architectures based on cyclic redundancy check (CRC) as error detection schemes for state-of-the-art finite field inversion over ${\mathrm{ GF}}(2^{m})$ for a polynomial basis. To verify the derivations of the formulations, software implementations are performed. Likewise, hardware implementations of the original finite field inversions with the proposed error detection schemes are performed over Xilinx field-programmable gate array (FPGA) verifying that the proposed schemes achieve high error coverage with acceptable overhead.

中文翻译:

GF(2)上FLT和ITA有限域反演的基于CRC的错误检测构造

二元扩展有限域 $ {\ mathrm {GF}}(2 ^ {m})$ 由于其在许多现代公共密钥密码系统和纠错码中的应用,因此受到了文献的广泛关注。尤其是 $ {\ mathrm {GF}}(2 ^ {m})$ 对于当前和量子后的密码学应用至关重要。已经研究了诸如费马小定理(FLT)和Itoh–Tsujii算法(ITA)之类的方案,以实现更好的性能。但是,此算术运算是一项复杂,昂贵且耗时的任务,可能需要成千上万个门,从而增加了其对自然缺陷的脆弱性机会。在这项工作中,我们提出了基于循环冗余校验(CRC)的高效硬件体系结构,作为用于最新的有限域反演的错误检测方案。 $ {\ mathrm {GF}}(2 ^ {m})$ 以多项式为基础。为了验证配方的推导,执行软件实现。同样,在Xilinx现场可编程门阵列(FPGA)上执行带有建议的错误检测方案的原始有限域反演的硬件实现,从而验证了提出的方案以可接受的开销实现了较高的错误覆盖率。
更新日期:2021-04-30
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