This paper presents a configurable structure to realize all-optical photonic crystal logic gates based on the interference effects. The photonic crystal waveguides are realized by creating defects in a square lattice of silicon rods in the air. The proposed structure consists of four input ports, including two ports for applying input signals of logic functions and two ports for applying control signals. Therefore, all-optical NOT, OR, XOR, AND, NOR, and NAND logic gates as well as \({\overline{\text{A}}} \cdot {\text{B}}\) and \({\overline{\text{A}}} + {\text{B}}\) logic functions can be implemented. Simulations are performed using the finite-difference time-domain method. The simulation results show high extinction ratios (ERs) of logic gates operating in the optical communication C band. The lowest ER_min is related to the NAND logic gate with a value of 14.2 dB at the wavelength of 1.55 μm. The maximum propagation delay is equal to 285 fs, corresponding to the OR and AND logic gates. Also, the total footprint of the structure is about 192 μm². The presented configurable structure is a promising candidate for use in integrated photonic circuits.

本文提出了一种基于干涉效应的全光子晶体逻辑门的可配置结构。通过在空气中的硅棒的方格子中产生缺陷来实现光子晶体波导。所提出的结构包括四个输入端口，包括两个用于施加逻辑功能的输入信号的端口和两个用于施加控制信号的端口。因此，全光学NOT，OR，XOR，AND，NOR和NAND逻辑门以及\（{\ overline {\ text {A}}} \ cdot {\ text {B}} \）和\（{ \ overline {\ text {A}}} + {\ text {B}} \）逻辑功能可以实现。使用时域有限差分法进行仿真。仿真结果表明，在光通信C波段工作的逻辑门具有很高的消光比（ER）。最低的ER _min与NAND逻辑门相关，在1.55μm的波长下的值为14.2 dB。最大传播延迟等于285 fs，对应于OR和AND逻辑门。此外，该结构的总占有面积为约192微米²。提出的可配置结构是用于集成光子电路的有希望的候选者。