This article presents a dual-output switched-capacitor (DOSC) dc–dc regulator to support hundreds-of-milliampere load per output. To save chip and board areas, the regulator adopts an all-nMOS auto-configurable power stage and generates two different output voltages via sharing flying capacitors and power transistors. In the controller, a continuous gate-drive modulation (CGDM) scheme is proposed to minimize the output cross regulation when one output undergoes large load step changes. A small output voltage ripple is also achieved at each output by the CGDM with only a small capacitance of $2.2~\mu \text{F}$ /output under heavy-load conditions. Implemented in a standard 0.13- $\mu \text{m}$ CMOS process, the proposed regulator generates two regulated outputs of 0.8 V and 1.6 V from the input of 2.7–4.2 V. It supports a maximum load of 600 mA/output, provides a low output ripple of ≤20 mV with the CGDM, and achieves a peak power efficiency of 89.5%. The output cross regulation is only 0.01 mV/mA under large load step changes of 580 mA. Compared with state-of-the-art SIMO dc–dc converters, the proposed work achieves > $4\times$ reduction in the output cross regulation under > $2\times$ larger load step changes and > $2\times$ smaller load capacitance/output.

中文翻译：

---

具有连续栅极驱动调制，可实现≤0.01mV/ mA交叉调节的1.2A双路输出SC DC-DC稳压器

本文介绍了一个双输出开关电容器（DOSC）dc-dc稳压器，它支持每个输出数百毫安的负载。为了节省芯片和电路板面积，该稳压器采用全nMOS可自动配置的功率级，并通过共享飞跨电容器和功率晶体管产生两个不同的输出电压。在控制器中，提出了一种连续栅极驱动调制（CGDM）方案，以在一个输出经历较大的负载阶跃变化时最大程度地减小输出交叉调节。CGDM还在每个输出上实现了很小的输出电压纹波，而电容仅为 $ 2.2〜\ mu \ text {F} $ /输出在重负载条件下。在标准0.13中实施 $ \ mu \ text {m} $ CMOS工艺，建议的稳压器从2.7–4.2 V的输入生成两个0.8 V和1.6 V的稳压输出。它支持600 mA /输出的最大负载，使用CGDM时提供≤20 mV的低输出纹波，并且达到89.5％的峰值功率效率。在580 mA的大负载阶跃变化下，输出交叉调节仅为0.01 mV / mA。与最新的SIMO dc-dc转换器相比，拟议的工作实现了> $ 4 \次$ 在>下减少输出交叉调节 $ 2 \次$ 较大的载荷步长变化和> $ 2 \次$ 较小的负载电容/输出。