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A low noise CMOS instrumentation amplifier for TMR-effect-based magnetic sensors
Modern Physics Letters B ( IF 1.8 ) Pub Date : 2021-04-20 , DOI: 10.1142/s0217984921501785
Wenbo Zhang 1, 2 , Weiping Chen 1, 2 , Liang Yin 1, 2 , Qiang Fu 1, 2 , Xinpeng Di 3, 4 , Yufeng Zhang 1, 2 , Xiaowei Liu 1, 2
Affiliation  

This paper presents a low 1/f noise CMOS single-ended output instrumentation amplifier (IA) for tunneling magnetic resistance (TMR) sensors. For high DC gain and linearity, the amplifier employs three-stage current-feedback topology. For high CMRR and PSRR, the first two stages employ fully differential input. To maintain stability and lower the power dissipation, the amplifier employs trans-conductance with capacitance feedback compensation (TCFC) topology. The amplifier employs chopping technology and continuous-time AC-coupled ripple reduction loop to reduce 1/f noise and chopping ripple. The whole chip is fabricated using 0.35 μm CMOS-BCD technology and the total area is 1 mm2. Test result shows an input-referred noise power spectral density (PSD) of 14 nV/Hz is achieved with 1 Hz 1/f corner. The bandwidth is larger than 50 kHz (65 ×magnification) with 20 pF load capacitor. The total current is 300 μA at 5 V supply.

中文翻译:

用于基于 TMR 效应的磁传感器的低噪声 CMOS 仪表放大器

本文提出了一个低1/F用于隧道磁阻 (TMR) 传感器的噪声 CMOS 单端输出仪表放大器 (IA)。对于高直流增益和线性度,放大器采用三级电流反馈拓扑。对于高 CMRR 和 PSRR,前两级采用全差分输入。为了保持稳定性并降低功耗,放大器采用跨导电容反馈补偿 (TCFC) 拓扑。该放大器采用斩波技术和连续时间交流耦合纹波减少环路来减少1/F噪声和斩波纹波。整个芯片采用0.35制造μm CMOS-BCD技术,总面积为1 mm 2。测试结果显示输入参考噪声功率谱密度 (PSD) 为 14 nV/赫兹以 1 Hz 实现1/F角落。带宽大于 50 kHz(65 ×放大)带 20 pF 负载电容。总电流300μA 5 V 电源。
更新日期:2021-04-20
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