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Analysis and Design of Lossy Capacitive Over-Neutralization Technique for Amplifiers Operating Near fMAX
IEEE Transactions on Circuits and Systems I: Regular Papers ( IF 5.2 ) Pub Date : 2021-03-02 , DOI: 10.1109/tcsi.2021.3060662
Dragan Simic , Patrick Reynaert

This paper proposes a technique to enhance the maximum achievable power gain ( $G_{MAX}$ ) of the two-port active network (2PAN) in the near- $f_{MAX}$ region. This technique is based on using the optimized passive-linear-lossy-reciprocal (PLLR) embedding to increase the unilateral power gain ( $U$ ) of the 2PAN and accordingly the $G_{MAX}$ . Due to the possibility to increase $U$ , it shows the potential to improve the conventional gain-boosting approach which relies on the passive-linear-lossless-reciprocal (PLLLR) embedding and keeps the $U$ constant. The concept itself is demonstrated on pseudo-differential NMOS pair using lossy capacitive feedback as the PLLR. This structure can serve as a basis for further gain optimization by implementing additional PLLLR embedding on top of it. Finally, by using the mentioned technique, a 190GHz amplifier is implemented in 28nm bulk CMOS technology, achieving 14.3dB of gain with 1.5dBm of $P_{SAT}$ and 2.6% of maximum PAE.

中文翻译:

在附近工作的放大器的有损电容过中和技术的分析和设计 F最大限度

本文提出了一种提高最大可实现功率增益的技术( $ G_ {MAX} $ )附近的两端口有源网络(2PAN) $ f_ {MAX} $ 地区。此技术基于使用优化的无源线性有损互易(PLLR)嵌入来增加单边功率增益( 美元 )的2PAN $ G_ {MAX} $ 。由于增加的可能性 美元 ,它显示了改进传统增益增强方法的潜力,该方法依赖于无源线性无损倒数(PLLLR)嵌入并保持 美元 不变。使用有损电容反馈作为PLLR在伪差分NMOS对上演示了该概念本身。通过在其之上实施额外的PLLLR嵌入,该结构可作为进一步增益优化的基础。最后,通过使用上述技术,在28nm体CMOS技术中实现了190GHz放大器,实现了14.3dB的增益和1.5dBm的增益。 $ P_ {SAT} $ 和最高PAE的2.6%。
更新日期:2021-04-20
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