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Design and Development of N-Level Symmetrical Multilevel Inverter Topology with Reduced Switches
Journal of Circuits, Systems and Computers ( IF 1.5 ) Pub Date : 2021-04-16 , DOI: 10.1142/s0218126621501978
K. Premkumar 1 , D. Shyam 1
Affiliation  

In this paper, 11-level multilevel inverter with reduced power switch configuration is developed and investigated. This proposed configuration can be extended for N levels with the required number of power switches. Comparative analysis between the proposed multilevel inverter topology and well-known existing multilevel inverter topologies is carried out. Fundamental switching angle calculation for the power switches of the proposed topology has been optimized using black widow optimization algorithm technique and also the proposed topology has been tested with the classical multicarrier alternative phase opposition disposition PWM technique. To test the effectiveness of the proposed topology, different tests have been conducted such as testing with different modulation indexes, DC input voltages, load settings and voltage ride-through capabilities. This paper presents various simulation and experimental results under various operating conditions to prove the performance of the proposed multilevel inverter topology.

中文翻译:

减少开关的 N 级对称多级逆变器拓扑的设计与开发

在本文中,开发和研究了具有减少功率开关配置的 11 电平多电平逆变器。这个建议的配置可以扩展为ñ水平与所需的电源开关数量。对所提出的多电平逆变器拓扑和众所周知的现有多电平逆变器拓扑进行了比较分析。所提出拓扑的功率开关的基本开关角计算已使用黑寡妇优化算法技术进行了优化,并且所提出的拓扑已使用经典的多载波交替相位相反配置 PWM 技术进行了测试。为了测试所提出拓扑的有效性,已经进行了不同的测试,例如使用不同的调制指数、直流输入电压、负载设置和电压穿越能力进行测试。
更新日期:2021-04-16
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