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Thermal analysis of the design parameters of a QFN package soldered on a PCB using a simulation approach
Microelectronics Reliability ( IF 1.6 ) Pub Date : 2021-04-17 , DOI: 10.1016/j.microrel.2021.114118
K. Hollstein , X. Yang , K. Weide-Zaage

Quad-Flat-No-Lead (QFN) packages are electric components that are producing a substantial amount of heat during operation due to significant power loss. Resulting elevated temperatures can lead to critical damage of the chip and the package, which could cause a loss of functionality. Therefore, controlling the maximum temperature within the package is crucial. Using thermal vias embedded in the PCB underneath the QFN is a common concept to support the heat flow. In this paper a simulation approach is presented using 3D Finite-Element-Modelling to identify the impact of influencing parameters on the temperature distribution within the package. Therefore, the build-up of the model is explained and applied material properties are given. Results for the determined temperature distribution for a reference parameter set are presented. Geometrical parameters like the thickness and the area size of the thermal pads and the copper layers are varied. Furthermore, the via count and distribution has been changed and additional inner layers have been added in order to act as a heat sink. The impact of these variations on the resulting component temperature will be discussed in the analysis part. The paper will round up with a discussion of simulation results and an outlook for future work.



中文翻译:

使用模拟方法对焊接在PCB上的QFN封装的设计参数进行热分析

四方无铅(QFN)封装是电气组件,由于功率损耗很大,在运行过程中会产生大量热量。升高的温度可能导致芯片和封装的严重损坏,从而可能导致功能丧失。因此,控制包装内的最高温度至关重要。在QFN下方使用嵌入PCB的热过孔是支持热量流动的常见概念。在本文中,提出了一种使用3D有限元建模的仿真方法,以识别影响参数对封装内温度分布的影响。因此,解释了模型的建立并给出了应用的材料特性。给出了参考参数集的确定温度分布的结果。诸如热垫和铜层的厚度和面积大小的几何参数是变化的。此外,通孔的数量和分布已更改,并添加了其他内层以用作散热器。这些变化对最终组件温度的影响将在分析部分中讨论。本文将围绕仿真结果的讨论和对未来工作的展望进行总结。

更新日期:2021-04-18
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