In this article, electrostatic discharge (ESD) induced soft failures (SFs) of a USB3 Gen1 device are investigated by direct transmission line pulse injection with varying pulsewidth, amplitude, and polarity to characterize the failure behavior of the interface and to create a SPICE model of the voltage and current waveform dependent failure thresholds. ESD protection by transient-voltage-suppression diodes is numerically simulated in several configurations. The results show viability of using well-established hard failure mitigation techniques for improving SF robustness. A good agreement between numerical simulation for optimized board design and measurements are achieved. A novel concept of SF system efficient ESD design is proposed and demonstrated to be effective for making decisions during early product development, in board designing and prototyping phase.

中文翻译：

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IC引脚建模和ESD引起的软故障的缓解

本文通过直接传输线脉冲注入来研究USB3 Gen1设备的静电放电（ESD）引起的软故障（SF），该脉冲注入具有变化的脉冲宽度，幅度和极性，以表征接口的故障行为并创建SPICE模型取决于电压和电流波形的故障阈值。在几种配置中，对瞬态电压抑制二极管的ESD保护进行了数值模拟。结果表明，使用完善的硬故障缓解技术来改善SF鲁棒性的可行性。在优化板设计的数值模拟和测量之间达成了良好的协议。提出了SF系统高效ESD设计的新颖概念，并证明了它在早期产品开发过程中可以有效地做出决策，