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A Partial Discharge Study of Medium-Voltage Motor Winding Insulation Under Two-Level Voltage Pulses With High Dv/Dt
IEEE Open Journal of Power Electronics Pub Date : 2021-03-30 , DOI: 10.1109/ojpel.2021.3069780
Boxue Hu 1 , Zhuo Wei 1 , Haoyang You 1 , Risha Na 1 , Rui Liu 1 , Han Xiong 1 , Pengyu Fu 1 , Julia Zhang 1 , Jin Wang 1
Affiliation  

Medium-voltage (e.g., 10 kV rated) silicon carbide (SiC) devices have great potentials in medium-voltage variable speed drives. But their high switching dv/dt can increase the voltage stress on motor windings and cause partial discharges. This paper presents a partial discharge study of a medium-voltage form-wound winding under two-level square-wave voltage pulses. A 10 kV SiC device-based test platform is built to generate voltage pulses with high dv/dt. A three-step test approach is proposed and employed to systematically investigate the effects of various voltage parameters on partial discharges. These include voltage rise/fall time, voltage pulse width, pulse repetitive rate, duty ratio, voltage polarity, fundamental frequency, and modulation index. Partial discharge inception voltages (PDIVs) and repetitive partial discharge inception voltages (RPDIVs) of the sample are measured with varied voltage parameters. Test results show that voltage rise/fall time is a major affecting factor which reduces PDIVs of the winding sample by 6.5% when it decreases from 800 ns to 100 ns. Based on test results, a hypothetical partial discharge mechanism is presented to explain the effects of fast voltage rise/fall edges. An empirical equation is also derived to estimate PDIVs of a winding sample under various voltage rise/fall time and pulse width conditions.

中文翻译:

具有高Dv / Dt的两电平电压脉冲下中压电机绕组绝缘的局部放电研究

中压(例如额定值为10 kV)的碳化硅(SiC)器件在中压变速驱动器中具有巨大的潜力。但是它们的高开关dv / dt会增加电机绕组上的电压应力并引起局部放电。本文介绍了在两级方波电压脉冲下中压成型绕组的局部放电研究。建立了一个基于10 kV SiC器件的测试平台,以生成具有高dv / dt的电压脉冲。提出了一种三步测试方法,用于系统研究各种电压参数对局部放电的影响。这些包括电压上升/下降时间,电压脉冲宽度,脉冲重复率,占空比,电压极性,基频和调制指数。用变化的电压参数测量样品的局部放电起始电压(PDIV)和重复的局部放电起始电压(RPDIV)。测试结果表明,电压上升/下降时间是一个主要的影响因素,当电压从800 ns下降到100 ns时,会使PDIV降低6.5%。根据测试结果,提出了一种假设的局部放电机制来解释快速电压上升/下降沿的影响。还导出了一个经验方程式,以估计在各种电压上升/下降时间和脉冲宽度条件下的绕组样本的PDIV。根据测试结果,提出了一种假设的局部放电机制来解释快速电压上升/下降沿的影响。还导出了一个经验方程式,以估计在各种电压上升/下降时间和脉冲宽度条件下的绕组样本的PDIV。根据测试结果,提出了一种假设的局部放电机制来解释快速电压上升/下降沿的影响。还导出了一个经验方程式,以估计在各种电压上升/下降时间和脉冲宽度条件下的绕组样本的PDIV。
更新日期:2021-04-16
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