In this paper, FinFETs are realized by integrating neutral beam etching(NBE) and microwave annealing (MWA) into the fabrication process. Electrical characteristics are measured at room temperature and parameters such as Sub-threshold swing of 89 mV/decade, I_on/I_off of 10⁶, DIBL of 72 mV/V and effective mobility (μ_eff) of 502 cm²V⁻¹ s⁻¹ are obtained with W_fin/L_gate = 40/100 nm. These characteristics are superior by using neutral beam etching than by using RIE-like condition, and the V_t shift at reduced L_gate is also suppressed. A damaged layer at high-k/Si interface by RIE-like condition is observed in the TEM image, which can correspond to the degradation in electrical characteristics. Furthermore, the proportional scaling of I_on versus W_fin indicates negligible S/D resistance due to good activation by Microwave annealing (MWA). In short, functional FinFETs were fabricated by Neutral beam etching (NBE) and Microwave annealing (MWA) for the first time, and these results pave ways for the techniques to be adopted in the advanced semiconductor processing. The SOI FinFETs demonstrate proportional scaling of on current versus the fin width and indicating that the S/D region is well activated by the microwave annealing method.

本文通过将中性束刻蚀（NBE）和微波退火（MWA）集成到制造过程中来实现FinFET。电特性是在室温下和参数，例如89毫伏/十倍的亚阈值摆幅测量，我_上/ I_关的10 ⁶，72毫伏/ V的DIBL和有效迁移率（μ _EFF 502厘米）² V ^-1通过W _fin / L _gate  ＝ 40 / 100nm获得 s ^-1。与使用类似RIE的条件相比，使用中性束蚀刻具有更好的特性，而且在降低L_栅极时V _t漂移也被抑制了。在TEM图像中观察到了类似RIE条件的高k / Si界面处的损伤层，这可能与电特性的下降相对应。此外，由于微波退火（MWA）的良好激活，I _on与W _fin的比例缩放表明S / D电阻可忽略不计。简而言之，功能性FinFET是通过中性束蚀刻（NBE）和微波退火（MWA）首次制造的，这些结果为先进的半导体工艺中采用的技术铺平了道路。SOI FinFET展示了导通电流与鳍片宽度的比例关系，并表明通过微波退火方法可以很好地激活S / D区域。