ABSTRACT

The very-large-scale-integration industry has been highly trying to attain miniaturization. This function causes several challenges regarding size, switching speed, power, and fault-tolerant at the nanoscale. Quantum-dot cellular automata (QCA) can contain a remarkable reduction in scale, fast switching rate, ultra-low energy consumption, and high fault-tolerant. Thus, fault-tolerant logic has attained the attention of several investigators in the QCA science domain. On the other hand, a binary-to-gray converter converts the input data to the gray number to facilitate error correction in digital communication. So, in the present investigation, we have demonstrated a structure of fault-tolerant binary-to-gray converter in QCA employing the majority gate, inverter gate, and cell redundancy on the wire. With the utilization of the QCADesigner 2.0.3 simulator, we have simulated and tested proposed circuits. In this paper, four factors, namely single-cell missing, displacement, misalignment, and extra single-cell, have been inspected by simulation software. The proposed fault-tolerant two-bit, three-bit, and four-bit binary-to-gray converter could attain 100% fault tolerance while a single missing defect existed in the layout.

摘要

超大规模集成产业一直在努力实现小型化。该功能在纳米级的尺寸、开关速度、功率和容错方面带来了一些挑战。量子点元胞自动机（QCA）具有规模显着缩小、切换速率快、超低能耗、高容错等特点。因此，容错逻辑已经引起了 QCA 科学领域一些研究人员的关注。另一方面，二进制到格雷码转换器将输入数据转换为格雷数，以便于数字通信中的纠错。因此，在目前的研究中，我们展示了 QCA 中采用多数门、反相器门和在线单元冗余的容错二进制到格雷转换器的结构。使用 QCADesigner 2.0。3模拟器，我们对所提出的电路进行了模拟和测试。本文通过仿真软件对单细胞缺失、位移、错位和额外单细胞四个因素进行了检验。所提出的容错两位、三位和四位二进制到格雷转换器可以在布局中存在单个缺失缺陷时实现 100% 容错。