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Four-Quadrant CMOS Analog Current Multiplier Using Frequency Compensation and 1.5 V Supply
Arabian Journal for Science and Engineering ( IF 2.9 ) Pub Date : 2021-04-11 , DOI: 10.1007/s13369-021-05563-1
Urvashi Bansal , Pankaj Masiwal , Monika Yadav , Mohit Mohlia , Niranjan Raj

This work presents two new CMOS designs of current mode squarer circuits using a 1.5 V supply. The four-quadrant multiplier has also been designed using proposed squarer circuits. To improve bandwidth, the resistive compensation scheme has been exploited. The input and output signals of proposed circuits are of current type and hence exhibit larger dynamic range contrary to voltage mode circuits. Various simulations have been carried out to check performance and validate theoretical analysis. It is observed that range of − 3 dB bandwidth, power consumption and linearity error of the proposed circuits I and II are 542.53 MHz and 1.13 GHz, 0.56 and 0.47 mW and 1.8 and 2%, respectively. In the state of the art, it is noticed that around 10–90% bandwidth is increased while using proposed circuits over most of the conventional circuits. All results are verified using spice tools and 0.18 µm CMOS technology parameters.



中文翻译:

采用频率补偿和1.5 V电源的四象限CMOS模拟电流倍增器

这项工作提出了使用1.5 V电源的电流模式平方器电路的两种新CMOS设计。四象限乘法器也已使用建议的平方器电路进行了设计。为了提高带宽,已经开发了电阻补偿方案。所提出的电路的输入和输出信号是电流类型的,因此与电压模式电路相反,表现出更大的动态范围。已经进行了各种模拟来检查性能并验证理论分析。可以看出,建议的电路I和II的− 3 dB带宽范围,功耗和线性误差分别为542.53 MHz和1.13 GHz,0.56和0.47 mW和1.8%和2%。在现有技术中,注意到在大多数常规电路上使用建议的电路时,带宽增加了大约10-90%。

更新日期:2021-04-11
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