Neural Processing Letters ( IF 3.1 ) Pub Date : 2021-04-05 , DOI: 10.1007/s11063-021-10458-1 Arish Sateesan , Sharad Sinha , Smitha K. G. , A. P. Vinod
In today’s world, the applications of convolutional neural networks (CNN) are limitless and are employed in numerous fields. The CNNs get wider and deeper to achieve near-human accuracy. Implementing such networks on resource constrained hardware is a cumbersome task. CNNs need to be optimized both on hardware and algorithmic levels to compress and fit into resource limited devices. This survey aims to investigate different optimization techniques of Vision CNNs, both on algorithmic and hardware level, which would help in efficient hardware implementation, especially for FPGAs.
中文翻译:
FPGA上的视觉卷积神经网络算法和硬件优化技术概述
在当今世界,卷积神经网络(CNN)的应用是无限的,并在许多领域中得到了应用。CNN越来越宽,越来越近,可以达到接近人类的准确性。在资源受限的硬件上实施此类网络是一项繁琐的任务。CNN需要在硬件和算法级别上都进行优化,以压缩并适合资源有限的设备。这项调查旨在在算法和硬件级别上研究视觉CNN的不同优化技术,这将有助于有效的硬件实现,尤其是对于FPGA。