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Ka-band time-domain multiplexing front-end with minimum switch area utilization on 22 nm fully depleted silicon-on-insulator CMOS technology
International Journal of Microwave and Wireless Technologies ( IF 1.4 ) Pub Date : 2021-03-31 , DOI: 10.1017/s1759078721000428
Mikko Hietanen , Jere Rusanen , Janne P. Aikio , Nuutti Tervo , Timo Rahkonen , Aarno Pärssinen

A time-domain duplexing radio frequency (RF) front-end with integrated antenna switch, power amplifier (PA), and low noise amplifier (LNA) was developed aiming for fifth-generation communication (5G) applications covering 24–28 GHz frequency range. Antenna switch utilizes pre-existing LNA input matching network together embedded with grounded shunt transistor switch to provide sufficient isolation of receive side from PA. Respectively, high impedance of off-state PA is assumed to achieve acceptable receive performance. Resulting output power is 13.6 dBm with 15 dB of peak small-signal gain at 28 GHz. Maximum average channel power was 4.8 dBm with 100 MHz 64-QAM OFDM signal within 5G adjacent channel power ratio and error vector magnitude specifications. Receive (RX) front-end achieves 5 dB noise figure at 24 GHz and 7 dB of peak gain. Performances of amplifiers degraded only by 2 dB from switch integration. The front-end dissipates 183 and 4.6 mW of power in transmit and receive mode, respectively. The simplistic design method minimizes cost both in circuit area (only 0.19 mm2) and design time making this front-end an attractive alternative in massive phased array applications using 22 nm complementary metal oxide semiconductor (CMOS) fully depleted silicon on insulator process.

中文翻译:

Ka 波段时域多路复用前端,在 22 nm 全耗尽绝缘体上硅 CMOS 技术上具有最小开关面积利用率

针对覆盖 24-28 GHz 频率范围的第五代通信 (5G) 应用,开发了具有集成天线开关、功率放大器 (PA) 和低噪声放大器 (LNA) 的时域双工射频 (RF) 前端. 天线开关利用预先存在的 LNA 输入匹配网络与接地并联晶体管开关一起嵌入,以提供接收侧与 PA 的充分隔离。分别假设关闭状态 PA 的高阻抗可实现可接受的接收性能。产生的输出功率为 13.6 dBm,在 28 GHz 时具有 15 dB 的峰值小信号增益。最大平均信道功率为 4.8 dBm,100 MHz 64-QAM OFDM 信号在 5G 相邻信道功率比和误差矢量幅度规格内。接收 (RX) 前端在 24 GHz 下实现了 5 dB 的噪声系数和 7 dB 的峰值增益。放大器的性能仅因开关集成而下降 2 dB。前端在发射和接收模式下分别消耗 183 和 4.6 mW 的功率。简单的设计方法最大限度地降低了电路面积的成本(仅 0.19 mm2) 和设计时间使该前端成为使用 22 nm 互补金属氧化物半导体 (CMOS) 完全耗尽绝缘体上硅工艺的大规模相控阵应用中有吸引力的替代方案。
更新日期:2021-03-31
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