We present a tool framework to compile and program mixed-signal circuits and systems on Floating-Gate (FG) based mixed-signal System-on-Chips (SoC) consisting of a digital processor and Field Programmable Analog Array (FPAA) fabric. We have modified the configuration of Verilog-to-Routing (VTR) to cover analog circuits and developed a tool called vpr2swcs to create the list of FG switches, that is going from a high level block description of the system to the addresses and bias values on the SoC. This tool enables users to generate macro blocks and customize block location while designing mixed-signal systems on the FPAA and also enables using routing fabric, composed of FGs, for Vector Matrix Multiplication (VMM), a computing element for an analog neural network. The paper demonstrates system level examples using this tool flow, where the experimental results have been proved in other publications.

我们提出了一个工具框架，用于在基于浮栅（FG）的混合信号片上系统（SoC）上编译和编程混合信号电路和系统，该系统由数字处理器和现场可编程模拟阵列（FPAA）结构组成。我们已经修改了Verilog-to-Routing（VTR）的配置以涵盖模拟电路，并开发了一个名为vpr2swcs的工具来创建FG开关列表，该工具将从系统的高级块描述到地址和偏置值在SoC上。该工具使用户能够在FPAA上设计混合信号系统时生成宏块并自定义块位置，还可以将由FG组成的路由结构用于矢量矩阵乘法（VMM），这是模拟神经网络的计算元素。本文演示了使用此工具流程的系统级示例，