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A Survey on Application Specific Processor Architectures for Digital Hearing Aids
Journal of Signal Processing Systems ( IF 1.6 ) Pub Date : 2021-03-20 , DOI: 10.1007/s11265-021-01648-0
Lukas Gerlach , Guillermo Payá-Vayá , Holger Blume

On the one hand, processors for hearing aids are highly specialized for audio processing, on the other hand they have to meet challenging hardware restrictions. This paper aims to provide an overview of the requirements, architectures, and implementations of these processors. Special attention is given to the increasingly common application-specific instruction-set processors (ASIPs). The main focus of this paper lies on hardware-related aspects such as the processor architecture, the interfaces, the application specific integrated circuit (ASIC) technology, and the operating conditions. The different hearing aid implementations are compared in terms of power consumption, silicon area, and computing performance for the algorithms used. Challenges for the design of future hearing aid processors are discussed based on current trends and developments.



中文翻译:

针对数字助听器的专用处理器体系结构的调查

一方面,助听器处理器高度专门用于音频处理,另一方面,它们必须满足具有挑战性的硬件限制。本文旨在概述这些处理器的要求,体系结构和实现。特别注意了越来越常见的专用指令集处理器(ASIP)。本文的主要重点在于与硬件相关的方面,例如处理器体系结构,接口,专用集成电路(ASIC)技术以及工作条件。比较了不同助听器的实现方式,包括功耗,硅面积和所使用算法的计算性能。根据当前的趋势和发展,讨论了未来助听器处理器设计的挑战。

更新日期:2021-03-21
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