Three-dimensional (3D) complementary metal–oxide–semiconductor (CMOS) integration could enable device scaling beyond the limits of conventional 2D CMOS technology. Such integration requires vertical electrical connections that pass through silicon substrates and interconnect stacked chips. The fabrication of these through-silicon vias (TSVs) creates new challenges in metrology, including the characterization of the thin isolation film deposited on the sidewalls of the TSVs and thickness characterization for wafer thinning. Here, we show that laser-induced terahertz emission microscopy can be used to characterize TSVs. Terahertz emission is observed through the excitation of a transient electric dipole in the depletion field of the TSV using femtosecond laser pulses. The detected terahertz waveform provides information about the local depletion field and thus structural information about the isolation film. By performing a time-of-flight measurement of the terahertz pulse, we can also extract the silicon wafer thickness.

三维 (3D) 互补金属-氧化物-半导体 (CMOS) 集成可以使器件尺寸缩小到超出传统 2D CMOS 技术的限制。这种集成需要通过硅衬底和互连堆叠芯片的垂直电连接。这些硅通孔 (TSV) 的制造给计量学带来了新的挑战，包括沉积在 TSV 侧壁上的薄隔离膜的表征和晶圆减薄的厚度表征。在这里，我们展示了激光诱导的太赫兹发射显微镜可用于表征 TSV。通过使用飞秒激光脉冲在 TSV 的耗尽场中激发瞬态电偶极子来观察太赫兹发射。检测到的太赫兹波形提供了有关局部耗尽场的信息，从而提供了有关隔离膜的结构信息。通过对太赫兹脉冲进行飞行时间测量，我们还可以提取硅晶片的厚度。