An analytical model of dual material single gate doping-less Tunnel FET (DM-GU-TFET) with gate underlap regions has been proposed. The potential of gate underlap area with channel area has been examined using modeling and the results are validated using TCAD simulation at boundary conditions. The proposed structure has been divided into ten distinct sections (counting source/drain depleted sections) to get potential models while settling the 1-Dimensional and 2-Dimensional Poisson equations (PE) condition in the respective sections. To settle the PE's at different limit conditions, explanatory estimate strategy is proposed and tested. The effect of geometric morphology, for instance under-lap length, has been analyzed, which is dependent on electrical attributes of DM-GU-TFET. The parabolic approximation technique is used to settle the PE's at various interface conditions. The effect of structural variations viz. gate underlap length and tunneling length is scrutinized using electrical characteristics of DM-GU-TFET. The resultant characteristics of proposed dopingless TFET represent a noteworthy improvement in surface potentials with variation in length of spacer region, underlap section and tunneling region.

提出了具有栅极下重叠区的双材料单栅极无掺杂隧道FET（DM-GU-TFET）的分析模型。使用模型检查了具有通道面积的门下重叠区域的潜力，并在边界条件下使用TCAD仿真验证了结果。拟议的结构已分为十个不同的部分（计算源极/漏极耗尽的部分），以得到潜在的模型，同时在各个部分中确定一维和二维泊松方程（PE）条件。为了解决不同限制条件下的PE，提出并测试了解释性估计策略。已经分析了几何形态的影响，例如重叠长度不足，这取决于DM-GU-TFET的电学属性。抛物线逼近技术用于确定PE' 在各种接口条件下。结构变化的影响即。使用DM-GU-TFET的电气特性来检查栅极的搭接长度和隧穿长度。所提出的无掺杂TFET的最终特性代表了表面电势的显着改善，其中隔离层区域，重叠部分和隧穿区域的长度发生了变化。