ABSTRACT

Mixed-signal applications form one of the hottest topics in the semiconductor industry. Considerable effort is required for the creation of designs that consist of both analog and digital blocks with high accuracy and performance. Therefore, mixed-signal verification can be considered as a significant matter. Former conventional verification approaches present very slow verification time, which ultimately increases time-to-market. A circuit of interest in modern systems is the sigma-delta analog-to-digital converter (ADC), which is used for encoding analog signals into digital codes, and many other applications. In this work, an effective functional verification architecture using Universal Verification Methodology (UVM) for a SystemVerilog-based sigma-delta ADC real-number model is proposed. The UVM effectiveness of the presented approach encourages the creation of a verification architecture with increased reusability and robustness, with respect to previous literature. The presented verification environment utilises constrained-random stimuli that exploit a novel sine-wave generator, analog assertions and coverage metrics for improved functional verification. Additionally, a metric for verification quality estimation is introduced for comparisons with other reference verification approaches. In all cases, the presented architecture verified the proper operation of the sigma-delta ADC with coverage of more than 98%, in accordance with the specification parameters that were used for the model.

摘要

混合信号应用是半导体行业最热门的话题之一。创建包含具有高精度和高性能的模拟和数字模块的设计需要付出相当大的努力。因此，混合信号验证可以被认为是一件重要的事情。以前的传统验证方法存在非常慢的验证时间，这最终会增加上市时间。现代系统中一个令人感兴趣的电路是 sigma-delta 模数转换器 (ADC)，它用于将模拟信号编码为数字代码，以及许多其他应用。在这项工作中，针对基于 SystemVerilog 的 sigma-delta ADC 实数模型，提出了一种使用通用验证方法 (UVM) 的有效功能验证架构。相对于以前的文献，所提出方法的 UVM 有效性鼓励创建具有更高可重用性和鲁棒性的验证架构。所呈现的验证环境利用约束随机刺激，利用新颖的正弦波发生器、模拟断言和覆盖度量来改进功能验证。此外，还引入了验证质量评估的度量标准，以便与其他参考验证方法进行比较。在所有情况下，所提出的架构都根据用于模型的规范参数验证了覆盖率超过 98% 的 sigma-delta ADC 的正确操作。所呈现的验证环境利用约束随机刺激，利用新颖的正弦波发生器、模拟断言和覆盖度量来改进功能验证。此外，还引入了验证质量评估的度量标准，以便与其他参考验证方法进行比较。在所有情况下，所提出的架构都根据用于模型的规范参数验证了覆盖率超过 98% 的 sigma-delta ADC 的正确操作。所呈现的验证环境利用约束随机刺激，利用新颖的正弦波发生器、模拟断言和覆盖度量来改进功能验证。此外，还引入了验证质量评估的度量标准，以便与其他参考验证方法进行比较。在所有情况下，所提出的架构都根据用于模型的规范参数验证了覆盖率超过 98% 的 sigma-delta ADC 的正确操作。