This article introduces a method for realizing the Gaussian activation function of radial-basis (RBF) neural networks with their hardware implementation on field-programmable gaits area (FPGAs). The results of modeling of the Gaussian function on FPGA chips of different families have been presented. RBF neural networks of various topologies have been synthesized and investigated. The hardware component implemented by this algorithm is an RBF neural network with four neurons of the latent layer and one neuron with a sigmoid activation function on an FPGA using 16-bit numbers with a fixed point, which took 1193 logic matrix gate (LUTs—LookUpTable). Each hidden layer neuron of the RBF network is designed on an FPGA as a separate computing unit. The speed as a total delay of the combination scheme of the block RBF network was 101.579 ns. The implementation of the Gaussian activation functions of the hidden layer of the RBF network occupies 106 LUTs, and the speed of the Gaussian activation functions is 29.33 ns. The absolute error is ± 0.005. The Spartan 3 family of chips for modeling has been used to get these results. Modeling on chips of other series has been also introduced in the article. RBF neural networks of various topologies have been synthesized and investigated. Hardware implementation of RBF neural networks with such speed allows them to be used in real-time control systems for high-speed objects.

本文介绍了一种基于径向可编程（RBF）神经网络的高斯激活函数及其在现场可编程步态区域（FPGA）上的硬件实现方法。提出了在不同系列的FPGA芯片上进行高斯函数建模的结果。已经合成和研究了各种拓扑的RBF神经网络。该算法实现的硬件组件是一个RBF神经网络，在FPGA上使用具有固定点的16位数字，具有潜层的四个神经元和一个具有S型激活功能的神经元，这需要1193个逻辑矩阵门（LUTs-LookUpTable ）。RBF网络的每个隐藏层神经元都在FPGA上设计为独立的计算单元。块RBF网络的组合方案的总延迟速度为101.579 ns。RBF网络隐藏层的高斯激活函数的实现占用106个LUT，高斯激活函数的速度为29.33 ns。绝对误差为±0.005。用于建模的Spartan 3芯片系列已用于获得这些结果。本文还介绍了其他系列芯片上的建模。已经合成和研究了各种拓扑的RBF神经网络。RBF神经网络的硬件实现速度如此之快，使其可以用于高速对象的实时控制系统中。本文还介绍了其他系列芯片上的建模。已经合成和研究了各种拓扑的RBF神经网络。RBF神经网络的硬件实现速度如此之快，使其可以用于高速对象的实时控制系统中。本文还介绍了其他系列芯片上的建模。已经合成和研究了各种拓扑的RBF神经网络。RBF神经网络的硬件实现速度如此之快，使其可以用于高速对象的实时控制系统中。