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Two hardware implementations for modular multiplication in the AMNS: Sequential and semi-parallel
Journal of Information Security and Applications ( IF 3.8 ) Pub Date : 2021-03-12 , DOI: 10.1016/j.jisa.2021.102770
Asma Chaouch , Laurent-Stéphane Didier , Fangan Yssouf Dosso , Nadia El Mrabet , Belgacem Bouallegue , Bouraoui Ouni

We propose two hardware architectures for the modular multiplication over a finite field Fp using the Adapted Modular Number System (AMNS). We present their optimized implementations, with low latency.



中文翻译:

AMNS中用于模块化乘法的两种硬件实现:顺序和半并行

我们为有限域上的模块化乘法提出了两种硬件架构 Fp使用自适应模块编号系统(AMNS)。我们介绍他们的优化实现,具有低延迟。

更新日期:2021-03-12
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