Approximate computing is established as a design alternative to improve the energy requirements of a vast number of applications, leveraging their intrinsic error tolerance. Voltage over-scaling (VOS) is one of the most energy-efficient approximation techniques, but its exploitation is still limited due to the large errors it induces. In this work, we investigate, for the first time, the resiliency of negative capacitance transistor (NCFET) technology to VOS in comparison to conventional CMOS technology. Our work reveals that circuits implemented using the NCFET technology exhibit much less timing errors under VOS due to the inherent voltage amplification provided by the ferroelectric layer. NCFET is one of the very promising emerging technologies that is rapidly evolving for low-power circuit as it enables the transistors to switch faster without the need to increase the voltage. We demonstrate how NCFET technology allows circuit designers to effectively employ VOS to boost the efficiency of their approximate circuits, while still keeping the induced errors marginal. Our analysis shows that the VOS-resilience of NCFET circuits enables maximizing the voltage decrease and thus, NCFET based VOS approximate circuits achieve from $1.83\times$ up to $2.78\times$ higher energy reduction compared to the corresponding FinFET circuits for the same error bounds.

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关于NCFET电路抗电压超标的能力

建立近似计算作为一种设计替代方案，以利用其固有的误差容忍度来提高大量应用程序的能源需求。电压超标度（VOS）是最节能的近似技术之一，但由于它会引起较大的误差，因此其开发仍然受到限制。在这项工作中，我们首次研究了与常规CMOS技术相比，负电容晶体管（NCFET）技术对VOS的弹性。我们的工作表明，由于铁电层提供的固有电压放大，使用NCFET技术实现的电路在VOS下表现出的时序误差要小得多。NCFET是非常有前途的新兴技术之一，正在迅速发展为低功耗电路，因为它使晶体管能够在不增加电压的情况下更快地切换。我们演示了NCFET技术如何使电路设计人员有效地利用VOS来提高其近似电路的效率，同时仍将引起的误差保持在很小的范围内。我们的分析表明，NCFET电路的VOS弹性可最大程度地降低电压，因此，基于NCFET的VOS近似电路可实现以下目标： $ 1.83 \次$ 取决于 $ 2.78 \次 在相同的误差范围内，与相应的FinFET电路相比，具有更高的能耗降低。