当前位置: X-MOL 学术IEEE Trans. Circuits Syst. I Regul. Pap. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
Neural Network Training With Stochastic Hardware Models and Software Abstractions
IEEE Transactions on Circuits and Systems I: Regular Papers ( IF 5.2 ) Pub Date : 2021-01-26 , DOI: 10.1109/tcsi.2021.3052981
Bonan Zhang , Lung-Yen Chen , Naveen Verma

Machine learning inference is of broad interest, increasingly in energy-constrained applications. However, platforms are often pushed to their energy limits, especially with deep learning models, which provide state-of-the-art inference performance but are also computationally intensive. This has motivated algorithmic co-design, where flexibility in the model and model parameters, derived from training, is exploited for hardware energy efficiency. This work extends a model-training algorithm referred to as Stochastic Data-Driven Hardware Resilience (S-DDHR) to enable statistical models of computations, amenable for energy/throughput aggressive hardware operating points as well as emerging variation-prone device technologies. S-DDHR itself extends the previous approach of DDHR by incorporating the statistical distribution of hardware variations for model-parameter learning, rather than a sample of the distributions. This is critical to developing accurate and composable abstractions of computations, to enable scalable hardware-generalized training, rather than hardware instance-by-instance training. S-DDHR is demonstrated and evaluated for a bit-scalable MRAM-based in-memory computing architecture, whose energy/throughput trade-offs explicitly motivate statistical computations. Using foundry data to model MRAM device variations, S-DDHR is shown to preserve high inference performance for benchmark datasets (MNIST, CIFAR-10, SVHN) as variation parameters are scaled to high levels, exhibiting less than 3.5% accuracy drop at $10 \times $ the nominal variation level.

中文翻译:

具有随机硬件模型和软件抽象的神经网络训练

机器学习推论引起了广泛的兴趣,在能量受限的应用中越来越多。但是,平台常常被推到极限,特别是在深度学习模型的支持下,该模型提供了最新的推理性能,但计算量也很大。这激发了算法的协同设计,其中利用训练中的模型和模型参数的灵活性来提高硬件能效。这项工作扩展了称为随机数据驱动的硬件弹性(S-DDHR)的模型训练算法,以实现统计的统计模型,适用于能耗/吞吐量大的硬件工作点以及易于出现变化的设备技术。S-DDHR本身通过合并用于模型参数学习的硬件变化的统计分布而不是分布样本来扩展DDHR的先前方法。这对于开发准确且可组合的计算抽象,启用可扩展的硬件通用训练而不是硬件逐实例训练至关重要。演示并评估了S-DDHR用于基于位可伸缩的基于MRAM的内存计算架构,该架构的能量/吞吐量权衡取舍明确地促进了统计计算。使用代工厂数据对MRAM器件的变化进行建模,当变化参数缩放到高水平时,S-DDHR被证明可以保持基准数据集(MNIST,CIFAR-10,SVHN)的高推理性能,并且在低于5%时精度下降 而不是样本分布。这对于开发准确且可组合的计算抽象,启用可扩展的硬件通用训练而不是硬件逐实例训练至关重要。演示并评估了S-DDHR用于基于位可伸缩的基于MRAM的内存中计算体系结构,其能量/吞吐量的权衡取舍明确地促进了统计计算。使用代工厂数据对MRAM器件的变化进行建模,当变化参数缩放到高水平时,S-DDHR被证明可以保持基准数据集(MNIST,CIFAR-10,SVHN)的高推理性能,并且在低于5%时精度下降 而不是样本分布。这对于开发精确且可组合的计算抽象,启用可扩展的硬件通用训练而不是硬件逐实例训练至关重要。演示并评估了S-DDHR用于基于位可伸缩的基于MRAM的内存中计算体系结构,其能量/吞吐量的权衡取舍明确地促进了统计计算。使用代工厂数据对MRAM设备的变化进行建模,当变化参数缩放到高水平时,S-DDHR被证明可以保持基准数据集(MNIST,CIFAR-10,SVHN)的高推理性能,在 而不是硬件逐个实例进行培训。演示并评估了S-DDHR用于基于位可伸缩的基于MRAM的内存中计算体系结构,其能量/吞吐量的权衡取舍明确地促进了统计计算。使用代工厂数据对MRAM设备的变化进行建模,当变化参数缩放到高水平时,S-DDHR被证明可以保持基准数据集(MNIST,CIFAR-10,SVHN)的高推理性能,在 而不是硬件逐个实例进行培训。演示并评估了S-DDHR用于基于位可伸缩的基于MRAM的内存中计算体系结构,其能量/吞吐量的权衡取舍明确地促进了统计计算。使用代工厂数据对MRAM设备的变化进行建模,当变化参数缩放到高水平时,S-DDHR被证明可以保持基准数据集(MNIST,CIFAR-10,SVHN)的高推理性能,在 $ 10 \次$ 标称变化水平。
更新日期:2021-03-09
down
wechat
bug