Time-domain reflectometry (TDR) is an established means of measuring impedance inhomogeneity of a variety of waveguides, providing critical data necessary to characterize and optimize the performance of high-bandwidth computational and communication systems. However, TDR systems with both the high spatial resolution (sub-cm) and voltage resolution (sub- $\mu \text{V}$ ) required to evaluate high-performance waveguides are physically large and often cost-prohibitive, severely limiting their utility as testing platforms and greatly limiting their use in characterizing and trouble-shooting fielded hardware. Consequently, there exists a growing technical need for an electronically simple, portable, and low-cost TDR technology. The receiver of a TDR system plays a key role in recording reflection waveforms; thus, such a receiver must have high analog bandwidth, high sampling rate, and high-voltage resolution. However, these requirements are difficult to meet using low-cost analog-to-digital converters (ADCs). This article describes a new TDR architecture, namely, jitter-based APC (JAPC), which obviates the need for external components based on an alternative concept, analog-to-probability conversion (APC) that was recently proposed. These results demonstrate that a fully reconfigurable and highly integrated TDR (iTDR) can be implemented on a field-programmable gate array (FPGA) chip without using any external circuit components. Empirical evaluation of the system was conducted using an HDMI cable as the device under test (DUT), and the resulting impedance inhomogeneity pattern (IIP) of the DUT was extracted with spatial and voltage resolutions of 5 cm and $80~ {\mu V}$ , respectively. These results demonstrate the feasibility of using the prototypical JAPC-based iTDR for real-world waveguide characterization applications.

中文翻译：

---

使用数字I / O的高性能，可重新配置，完全集成的时域反射仪架构

时域反射仪（TDR）是一种测量各种波导的阻抗不均匀性的既定手段，可提供表征和优化高带宽计算和通信系统性能所必需的关键数据。但是，同时具有高空间分辨率（sub-cm）和电压分辨率（sub-cm）的TDR系统 $ \ mu \ text {V} $ 评估高性能波导所需的物理空间很大，并且通常成本高昂，严重限制了它们作为测试平台的实用性，并极大地限制了它们在表征和调试现场硬件方面的用途。因此，对电子上简单，便携式和低成本的TDR技术的技术需求不断增长。TDR系统的接收器在记录反射波形方面起着关键作用。因此，这种接收机必须具有高模拟带宽，高采样率和高电压分辨率。但是，使用低成本的模数转换器（ADC）很难满足这些要求。本文介绍了一种新的TDR体系结构，即基于抖动的APC（JAPC），该体系结构无需使用替代概念的外部组件，最近提出的模拟到概率转换（APC）。这些结果表明，可以在现场可编程门阵列（FPGA）芯片上实现完全可重新配置且高度集成的TDR（iTDR），而无需使用任何外部电路组件。使用HDMI电缆作为被测设备（DUT）对系统进行了实证评估，并以5 cm和5 cm的空间和电压分辨率提取了DUT的最终阻抗不均匀性图案（IIP）。 $ 80〜{\ mu V} $ ， 分别。这些结果证明了将基于JAPC的原型iTDR用于实际波导表征应用的可行性。