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ECM modeling and performance tuning of SpMV and Lattice QCD on A64FX
arXiv - CS - Performance Pub Date : 2021-03-04 , DOI: arxiv-2103.03013
Christie Alappat, Nils Meyer, Jan Laukemann, Thomas Gruber, Georg Hager, Gerhard Wellein, Tilo Wettig

The A64FX CPU is arguably the most powerful Arm-based processor design to date. Although it is a traditional cache-based multicore processor, its peak performance and memory bandwidth rival accelerator devices. A good understanding of its performance features is of paramount importance for developers who wish to leverage its full potential. We present an architectural analysis of the A64FX used in the Fujitsu FX1000 supercomputer at a level of detail that allows for the construction of Execution-Cache-Memory (ECM) performance models for steady-state loops. In the process we identify architectural peculiarities that point to viable generic optimization strategies. After validating the model using simple streaming loops we apply the insight gained to sparse matrix-vector multiplication (SpMV) and the domain wall (DW) kernel from quantum chromodynamics (QCD). For SpMV we show why the CRS matrix storage format is not a good practical choice on this architecture and how the SELL-$C$-$\sigma$ format can achieve bandwidth saturation. For the DW kernel we provide a cache-reuse analysis and show how an appropriate choice of data layout for complex arrays can realize memory-bandwidth saturation in this case as well. A comparison with state-of-the-art high-end Intel Cascade Lake AP and Nvidia V100 systems puts the capabilities of the A64FX into perspective. We also explore the potential for power optimizations using the tuning knobs provided by the Fugaku system, achieving energy savings of about 31% for SpMV and 18% for DW.

中文翻译:

在A64FX上对SpMV和Lattice QCD进行ECM建模和性能调整

A64FX CPU可以说是迄今为止功能最强大的基于Arm的处理器设计。尽管它是传统的基于缓存的多核处理器,但其峰值性能和内存带宽可与加速器设备相媲美。对于希望利用其全部潜力的开发人员而言,对它的性能特征有一个很好的了解是至关重要的。我们详细介绍了富士通FX1000超级计算机中使用的A64FX的体系结构,该分析可以构建稳态循环的执行缓存-内存(ECM)性能模型。在此过程中,我们确定了指向可行的通用优化策略的体系结构特性。在使用简单的流循环验证模型之后,我们将获得的见解应用于量子色动力学(QCD)的稀疏矩阵矢量乘法(SpMV)和域壁(DW)内核。对于SpMV,我们将说明为什么CRS矩阵存储格式在该体系结构上不是一个好的实用选择,以及SELL- $ C $-$ \ sigma $格式如何实现带宽饱和。对于DW内核我们提供了一个高速缓存重用分析和显示数据布局的复杂阵列合适的选择如何能够实现内存带宽饱和度在这种情况下也是如此。通过与最新的高端英特尔Cascade Lake AP和Nvidia V100系统进行比较,可以看到A64FX的功能。我们还使用Fugaku系统提供的调节旋钮来探索功率优化的潜力,
更新日期:2021-03-05
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