Transient simulation of complex converter topologies is a challenging problem, especially in detailed analysis tools like SPICE. Transistor models presented for SPICE are often evaluated by accuracy, with less consideration for the computational cost of model elements. In order to optimize models for application simulations, this research quantifies the relative simulation performance of modeling approaches and contextualizes the results with regard to accuracy. It is well established that the primary contributor to semiconductor dynamic behavior is the voltage-dependent interelectrode capacitances. Therefore, this study isolates these model components to resolve their influence on model accuracy and run-time. Both the voltage-dependencies modeled, and the mathematic formulation chosen strongly influence the accuracy of interelectrode capacitance models. In addition to these factors, the specific implementation chosen within SPICE also determines simulation performance. Through careful evaluation of these factors, this study offers specific recommendations for optimal implementations of interelectrode capacitances in SPICE.

中文翻译：

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SPICE中SiC MOSFET模型的计算效率分析：动态行为

复杂转换器拓扑的瞬态仿真是一个具有挑战性的问题，尤其是在像SPICE这样的详细分析工具中。为SPICE提供的晶体管模型通常通过准确性进行评估，而很少考虑模型元素的计算成本。为了优化用于应用程序仿真的模型，本研究量化了建模方法的相对仿真性能，并根据准确性对结果进行了上下文化。众所周知，对半导体动态行为的主要贡献是与电压有关的电极间电容。因此，本研究隔离了这些模型组件，以解决它们对模型准确性和运行时间的影响。两种电压相关性均已建模，所选择的数学公式会极大地影响电极间电容模型的准确性。除了这些因素之外，SPICE中选择的特定实现方式还决定了仿真性能。通过仔细评估这些因素，本研究为SPICE中电极间电容的最佳实现提供了具体建议。