The factors limiting channel mobility in AlSiO/p-type GaN-based metal-oxide-semiconductor field-effect transistors (MOSFETs) were systematically investigated. MOSFETs with various thin interfacial layers (ILs) between Al_0.78Si_0.22O_y films and Mg-doped GaN layers were prepared and found to exhibit different channel mobilities. The maximum effective mobility showed a significant correlation with the threshold voltage (V_t) and the hysteresis (ΔV_t) in the transfer characteristics of these devices, such that the mobility decreased with increasing V_t and ΔV_t. This effect can be explained by electron capture in and emission from border traps situated near the conduction band minimum for GaN. The insertion of a 3-nm-thick SiO₂ IL drastically enhanced the effective mobility and simultaneously reduced the ΔV_t value. Hall effect measurements with an applied gate voltage were used to determine the mobility of free electrons while excluding electrons captured in the border traps. The Hall effect mobility was much higher than the effective mobility, indicating that mobility was in fact reduced by the capture of electrons by the border traps. The ratio of electrons captured by border traps to the overall electrons induced by a gate bias was greatly lowered in a MOSFET incorporating a SiO₂ IL. When a high vertical electric field of approximately 1 MV/cm was present in the device channel, the Hall effect mobility was slightly increased following the insertion of an IL. These results suggest that the IL reduced the interfacial roughness and/or affected the screening out of scattering due to potential fluctuations of the AlSiO.

中文翻译：

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GaN基金属氧化物半导体场效应晶体管中的沟道迁移率分析

系统地研究了限制AlSiO / p型GaN基金属氧化物半导体场效应晶体管（MOSFET）中沟道迁移率的因素。制备了在Al _0.78 Si _0.22 O _y膜和Mg掺杂的GaN层之间具有各种薄界面层（IL）的MOSFET，发现它们具有不同的沟道迁移率。在这些器件的传输特性中，最大有效迁移率与阈值电压（V _t）和磁滞（ΔV _t）呈显着相关，因此迁移率随V _t和ΔV _t的增加而降低。。可以通过位于GaN导带最小值附近的边界陷阱中的电子俘获和发射来解释这种效应。插入3 nm厚的SiO ₂ IL大大提高了有效迁移率，同时降低了ΔV _t值。使用霍尔效应和施加的栅极电压来确定自由电子的迁移率，同时排除在边界陷阱中捕获的电子。霍尔效应迁移率远高于有效迁移率，表明迁移率实际上由于边界陷阱捕获电子而降低。在结合了SiO ₂的MOSFET中，边界陷阱俘获的电子与栅极偏置引起的总电子的比率大大降低白介素 当器件通道中存在大约1 MV / cm的高垂直电场时，在插入IL后霍尔效应迁移率会略有增加。这些结果表明，由于AlSiO的潜在波动，IL降低了界面粗糙度和/或影响了筛分的散射。