This letter presents a novel high energy-efficient switching scheme with low common-mode level variation for successive approximation register (SAR) analog-to-digital converters. Benefit from the merge capacitor split and C-2C techniques, the proposed switching scheme achieves 98% saving in switching energy and 86.91% reduction in capacitor area over the conventional scheme without reset energy. Compared with state-of-the-art works, the area saving is the highest. Meanwhile, the common-mode level at the comparator input is V_cm except the second cycle and the last cycle during SAR ADC conversion phase, which reduces the dynamic offset of the comparator greatly.

这封信为连续逼近寄存器（SAR）模数转换器提供了一种具有低共模电平变化的新颖的高能效开关方案。得益于合并电容器拆分和C-2C技术，与没有复位能量的传统方案相比，拟议的开关方案可节省98％的开关能量，并减少86.91％的电容器面积。与最新技术相比，节省的面积最大。同时，在SAR ADC转换阶段的第二个周期和最后一个周期之外，比较器输入的共模电平为V _cm，这大大降低了比较器的动态失调。