Abstract

The TCAD simulation of high-voltage 4H-SiC-based p⁺–n–n⁺ diodes with an edge semi-insulating i-type region created via the complete compensation for doping donors in the n region by deep carrier traps (the energy position of the traps in the 4H-SiC band gap is 1.2 eV below the bottom of the conduction band) is performed. It is shown that the efficiency of the edge semi-insulating i-type region at room temperature is close to 100%: the avalanche breakdown voltage of the p⁺–n–n⁺ diode with the edge i region is 1100 V, a value equal to the breakdown voltage of an idealized diode with a one-dimensional p⁺–n–n⁺ structure. The efficiency of the i-type region as the edge region gradually deteriorates with an increase in temperature above 600 K due to the thermal emission of electrons captured at the traps. The results obtained are briefly discussed in view of the practical application of radiation technology for the formation of edge semi-insulating i regions in 4H-SiC devices.

中文翻译：

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具有边缘半绝缘区的高压4 H -SiC二极管的TCAD模拟

摘要

通过完全补偿深载流子陷阱对n区掺杂施主进行的补偿，创建了具有边缘半绝缘i型区的基于4 H -SiC的p ⁺ – n – n ⁺高压高压二极管的TCAD仿真在4 H -SiC带隙中将陷阱的位置降低到导带底部以下1.2 eV）。结果表明，室温下边缘半绝缘的i型区域的效率接近100％：带有边缘的p ⁺ – n – n ⁺二极管的雪崩击穿电压i区域为1100 V，该值等于具有一维p ⁺ – n – n ⁺结构的理想二极管的击穿电压。由于在陷阱处捕获的电子的热发射，随着温度升高到600 K以上，i型区域作为边缘区域的效率逐渐降低。鉴于辐射技术在4 H -SiC器件中形成边缘半绝缘i区域的实际应用，简要讨论了获得的结果。