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Metallization of Vias in Silicon Wafers to Produce Three-Dimensional Microstructures
Russian Microelectronics Pub Date : 2021-02-19 , DOI: 10.1134/s1063739721010108
A. I. Vorobjova , V. A. Labunov , E. A. Outkina , D. V. Grapov

Abstract

The processes of electrochemical deposition into a matrix of vertical vias of different diameters (500–2000 nm) in Si/SiO2 substrates with a TiN barrier layer at the bottom of the holes are studied. Morphological studies of the metal in the holes show that the structure of copper clusters is rather uniform and is formed from crystallites of ~30 to 50 nm. Repeatability and stability with a homogeneous structure and with holes filled 100% by Cu determine the prospect of using the Si/SiO2/Cu system as a basic element for creating three-dimensional micro- and nanostructures, as well as for the 3D assembly of IC crystals.



中文翻译:

硅晶圆中过孔的金属化以产生三维微结构

摘要

研究了在具有底部TiN阻挡层的Si / SiO 2衬底中,化学沉积到不同直径(500-2000 nm)的垂直通孔矩阵中的过程。孔中金属的形态学研究表明,铜簇的结构相当均匀,由约30至50 nm的微晶形成。具有均匀结构的可重复性和稳定性以及铜中100%填充的孔确定了使用Si / SiO 2 / Cu系统作为创建三维微米和纳米结构以及3D组装的基本元素的前景IC晶体。

更新日期:2021-02-19
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