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A high performance scalable fuzzy based modified Asymmetric Heterogene Multiprocessor System on Chip (AHt-MPSOC) reconfigurable architecture
Journal of Intelligent & Fuzzy Systems ( IF 1.7 ) Pub Date : 2021-02-16 , DOI: 10.3233/jifs-189737
Arun Prasath Raveendran 1 , Jafar A. Alzubi 2 , Ramesh Sekaran 3 , Manikandan Ramachandran 4
Affiliation  

This Ensuing generation of FPGA circuit tolerates the combination of lot of hard and soft cores as well as devoted accelerators on a chip. The Heterogene Multi-Processor System-on-Chip (Ht-MPSoC) architecture accomplishes the requirement of modern applications. A compound System on Chip (SoC) system designed for single FPGA chip, and that considered for the performance/power consumption ratio. In the existing method, a FPGA based Mixed Integer Programming (MIP) model used to define the Ht-MPSoC configuration by taking into consideration the sharing hardware accelerator between the cores. However, here, the sharing method differs from one processor to another based on FPGA architecture. Hence, high number of hardware resources on a single FPGA chip with low latency and power targeted. For this reason, a fuzzy based MIP and Graph theory based Traffic Estimator (GTE) are proposed system used to define New asymmetric multiprocessor heterogene framework on microprocessor (AHt-MPSoC) architecture. The bandwidths, energy consumption, wait and transmission range are better accomplished in this suggested technique than the standard technique and it is also implemented with a multi-task framework. The new Fuzzy control-based AHt-MPSoC analysis proves significant improvement of 14.7 percent in available bandwidth and 89.8 percent of energy minimized to various traffic scenarios as compared to conventional method.

中文翻译:

一种基于高性能可扩展模糊的改进的非对称异质多处理器片上系统(AHt-MPSOC)可重配置架构

随后的FPGA电路可以容忍许多硬核和软核以及芯片上专用的加速器的组合。异质多处理器片上系统(Ht-MPSoC)架构满足了现代应用程序的需求。为单个FPGA芯片设计的复合片上系统(SoC)系统,考虑了性能/功耗比。在现有方法中,基于FPGA的混合整数编程(MIP)模型用于通过考虑内核之间的共享硬件加速器来定义Ht-MPSoC配置。但是,在这里,基于FPGA架构,共享方法因处理器而异。因此,单个FPGA芯片上的大量硬件资源具有低延迟和低功耗目标。为此原因,提出了一种基于模糊MIP和图论的流量估计器(GTE)系统,该系统用于在微处理器体系结构(AHt-MPSoC)上定义新的非对称多处理器异构框架。与标准技术相比,该建议技术可以更好地实现带宽,能耗,等待时间和传输范围,并且还可以通过多任务框架来实现。与传统方法相比,基于模糊控制的新AHt-MPSoC分析证明在各种流量情况下,可用带宽显着提高了14.7%,最小化了89.8%的能量。与标准技术相比,此建议技术可以更好地实现等待和传输范围,并且还可以通过多任务框架来实现。与传统方法相比,基于模糊控制的新AHt-MPSoC分析证明在各种流量情况下,可用带宽显着提高了14.7%,最小化了89.8%的能量。与标准技术相比,此建议技术可以更好地实现等待和传输范围,并且还可以通过多任务框架来实现。与传统方法相比,基于模糊控制的新AHt-MPSoC分析证明在各种流量情况下,可用带宽显着提高了14.7%,最小化了89.8%的能量。
更新日期:2021-02-17
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