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Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology
Circuit World ( IF 0.8 ) Pub Date : 2021-02-15 , DOI: 10.1108/cw-06-2020-0120
Sankit Kassa , Prateek Gupta , Manoj Kumar , Thompson Stephan , Ramani Kannan

Purpose

In nano-scale-based very large scale integration technology, quantum-dot cellular automata (QCA) is considered as a strong and capable technology to replace the well-known complementary metal oxide semiconductor technology. In QCA technique, rotated majority gate (RMG) design is not explored greatly, and therefore, its advantages compared to original majority gate are unnoticed. This paper aims to provide a thorough observation at RMG gate with its capability to build robust circuits.

Design/methodology/approach

This paper presents a new methodology for structuring reliable 2n-bit full adder (FA) circuit design in QCA utilizing RMG. Mathematical proof is provided for RMG gate structure. A new 1-bit FA circuit design is projected here, which is constructed with RMG gate and clock-zone-based crossover approach in its configuration.

Findings

A new structure of a FA is projected in this paper. The proposed design uses only 50 number of QCA cells in its implementation with a latency of 3 clock zones. The proposed 1-bit FA design conception has been checked for its structure robustness by designing various 2, 4, 8, 16, 32 and 64-bit FA designs. The proposed FA designs save power from 46.87% to 25.55% at maximum energy dissipation of circuit level, 39.05% to 23.36% at average energy dissipation of circuit-level and 42.03% to 37.18% at average switching energy dissipation of circuit level.

Originality/value

This paper fulfills the gape of focused research for RMG with its detailed mathematical modeling analysis.



中文翻译:

量子点元胞自动机纳米技术中基于旋转多数门的 2n 位全加器设计

目的

在基于纳米级的超大规模集成技术中,量子点元胞自动机(QCA)被认为是替代众所周知的互补金属氧化物半导体技术的强大而有能力的技术。在 QCA 技术中,旋转多数门 (RMG) 设计没有被广泛探索,因此与原始多数门相比,它的优势没有被注意到。本文旨在通过其构建稳健电路的能力对 RMG 门进行彻底的观察。

设计/方法/方法

本文提出了一种利用 RMG 在 QCA 中构建可靠的 2n 位全加器 (FA) 电路设计的新方法。为RMG 门结构提供了数学证明。此处提出了一种新的 1 位 FA 电路设计,该设计在其配置中采用 RMG 门和基于时钟区的交叉方法构建。

发现

本文提出了一种新的 FA 结构。建议的设计在其实现中仅使用 50 个 QCA 单元,延迟为 3 个时钟区。通过设计各种 2、4、8、16、32 和 64 位 FA 设计,已经检查了所提出的 1 位 FA 设计概念的结构稳健性。所提出的 FA 设计在电路级的最大能量耗散下节省了 46.87% 到 25.55% 的功率,在电路级平均能量耗散下节省了 39.05% 到 23.36%,在电路级平均开关能量耗散下节省了 42.03% 到 37.18%。

原创性/价值

本文通过详细的数学建模分析填补了 RMG 重点研究的空白。

更新日期:2021-02-15
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