This article presents a digital V ² constant on -time control buck converter with adaptive voltage positioning (AVP) and automatic closed-loop output impedance ( Z _oc ) calibration for advanced system-on-a-chip processors. To ensure that the output voltage deviation remains within the desired range, the system is equipped with AVP. For an optimal AVP design, the system includes a second-order digital inductor current sensor for deriving a constant Z _oc within a wide bandwidth. A detailed system-level analysis was performed to design the proposed control architecture. Considering the inevitable variation and aging of power stage components, the system is equipped with an online real-time Z _oc calibration mechanism established to ensure the performance of AVP control. A prototype chip was fabricated using a 90-nm complementary metal–oxide–semiconductor (CMOS) process. The digital controller was fully realized using a standard cell library. Under a 0.9-A load transient, the measured output voltage could be adequately constrained within a specified 1.1-V and 110-mV AVP window.

中文翻译：

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具有自适应电压定位和自动校准机制的数字V ²恒定导通时间控制Buck转换器

本文介绍了数字V ²常数上 自适应电压定位（AVP）和自动闭环输出阻抗的实时控制降压转换器（ ž _oc ）先进的片上系统处理器的校准。为确保输出电压偏差保持在所需范围内，系统配备了AVP。为了实现最佳的AVP设计，该系统包括一个二阶数字电感器电流传感器，用于得出恒定值。ž _oc在较宽的带宽内。进行了详细的系统级分析，以设计建议的控制体系结构。考虑到功率级组件不可避免的变化和老化，该系统配备了在线实时系统ž 建立了_oc校准机制以确保AVP控制的性能。使用90纳米互补金属-氧化物-半导体（CMOS）工艺制造了原型芯片。使用标准单元库可以完全实现数字控制器。在0.9A的负载瞬变情况下，可以将输出的测量电压充分限制在指定的1.1V和110mV AVP范围内。